Regulator applied on output terminal of power source to adjust adjusting current for increasing reference voltage when sensing decrease of reference voltage and decreasing reference voltage when sensing increase of reference voltage and regulating method

Patent metadata

Field	Value
Publication number	US-9665114-B2
Application number	US-201314043859-A
Country	US
Kind code	B2
Filing date	Oct 2, 2013
Priority date	Oct 2, 2013
Publication date	May 30, 2017
Grant date	May 30, 2017

Abstract

A regulator applied to regulate a first reference voltage on an output terminal, the regulator includes: a sensing circuit, arranged to sense a variation of the first reference voltage on the output terminal to generate a sensing signal; and a gain stage, arranged to provide an adjusting current to the output terminal in response to the sensing signal for reducing the variation of the first reference voltage, and the gain stage is coupled in parallel to a loading circuit powered by the first reference voltage.

First claim

What is claimed is:

1. A regulator, comprising:
a sensing circuit, arranged to sense a variation of a first reference voltage on an output terminal to generate a sensing signal; and
a gain stage, arranged to adjust an adjusting current to the output terminal in response to the sensing signal for reducing the variation of the first reference voltage to regulate the first reference voltage on the output terminal, and the gain stage is coupled in parallel to a loading circuit powered by the first reference voltage;
wherein when the sensing circuit senses a decrease of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to increase the first reference voltage on the output terminal, and when the sensing circuit senses an increase of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to decrease the first reference voltage on the output terminal;
wherein the sensing circuit comprises:
a current source, having a first terminal coupled to the output terminal, for generating a reference current;
a diode-connected transistor, having a drain terminal coupled to a second terminal of the current source to receive the reference current, and a source terminal coupled to a second reference voltage; and
a capacitive circuit, having a first terminal coupled to the output terminal, and a second terminal coupled to a gate terminal of the diode-connected transistor;

wherein the drain terminal of the diode-connected transistor is coupled to the gate terminal of the diode-connected transistor, and the sensing signal is generated at the gate terminal of the diode-connected transistor.

2. The regulator of claim 1 , wherein the sensing circuit has a terminal directly coupled to the output terminal for sensing the variation of the first reference voltage.

3. The regulator of claim 1 , wherein the gain stage has a terminal directly coupled to the output terminal for providing the adjusting current to the output terminal.

4. The regulator of claim 1 , wherein the output terminal is directly coupled to a power source for receiving the first reference voltage outputted by the power source.

5. The regulator of claim 1 , wherein the sensing circuit is a high pass filter arranged for performing a high pass operation upon the variation of the first reference voltage to generate the sensing signal.

6. The regulator of claim 1 , wherein the gain stage comprises a trans-conducting circuit arranged for converting the sensing signal in a way of voltage form into the adjusting current.

7. The regulator of claim 1 , wherein the gain stage comprises:
a field-effect transistor (FET), having a gate terminal to receive the sensing signal, a drain terminal coupled to the output terminal, and a source terminal coupled to a second reference voltage.

8. The regulator of claim 1 , wherein the output terminal is an output port for providing the first reference voltage to the loading circuit.

9. The regulator of claim 6 , wherein the gain stage further comprises:
a protection circuit, coupled between the trans-conducting circuit and the output terminal, for inducing a voltage drop between the output terminal and the trans-conducting circuit.

10. A regulator, comprising:
a sensing circuit, arranged to sense a variation of a first reference voltage on an output terminal to generate a sensing signal; and
a gain stage, arranged to adjust an adjusting current to the output terminal in response to the sensing signal for reducing the variation of the first reference voltage to regulate the first reference voltage on the output terminal, and the gain stage is coupled in parallel to a loading circuit powered by the first reference voltage;
wherein when the sensing circuit senses a decrease of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to increase the first reference voltage on the output terminal, and when the sensing circuit senses an increase of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to decrease the first reference voltage on the output terminal;
wherein the gain stage comprises:
a trans-conducting circuit, arranged for converting the sensing signal in a way of voltage form into the adjusting current and
a protection circuit, coupled between the trans-conducting circuit and the output terminal, arranged for inducing a voltage drop between the output terminal and the trans-conducting circuit

wherein the protection circuit comprises:
a first field-effect transistor, having a gate terminal coupled to the output terminal, a drain terminal coupled to the output terminal, and a source terminal coupled to the trans-conducting circuit.

11. The regulator of claim 10 , wherein the trans-conducting circuit comprises:
a second field-effect transistor, having a gate terminal to receive the sensing signal, a drain terminal coupled to the source terminal of the first field-effect transistor, and a source terminal coupled to a second reference voltage.

12. The regulator of claim 11 , wherein the first field-effect transistor is an I/O (Input/Output) device, the second field-effect transistor is a core device.

13. The regulator of claim 11 , wherein a breakdown voltage of the second field-effect transistor is smaller than the breakdown voltage of the first field-effect transistor.

14. A regulating method, comprising:
sensing a variation of a first reference voltage on an output terminal to generate a sensing signal; and
using a gain stage for adjusting an adjusting current to the output terminal in response to the sensing signal for reducing the variation of the first reference voltage to regulate the first reference voltage on the output terminal, and the gain stage is coupled in parallel to a loading circuit powered by the first reference voltage;
wherein when sensing a decrease of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to increase the first reference voltage on the output terminal, and when sensing an increase of the first reference voltage, the sensing signal adjusts the adjusting current via the gain stage coupled in parallel to the loading circuit to decrease the first reference voltage on the output terminal;
wherein the step of sensing the variation of the first reference voltage on the output terminal to generate the sensing signal comprises:
providing a current source to generate a reference current;
providing a diode-connected transistor having a drain terminal to receive the reference current, and a source terminal coupled to a second reference voltage; and
providing a capacitive circuit having a first terminal coupled to the output terminal, and a second terminal coupled to a gate terminal of the diode-connected transistor;
wherein the drain terminal of the diode-connected transistor is coupled to the gate terminal of the diode-connected transistor.

15. The regulating method of claim 14 , wherein the output terminal is directly coupled to a power source for receiving the first reference voltage outputted by the power source.

16. The regulating method of claim 14 , wherein the step of sensing the variation of the first reference voltage on the output terminal to generate the sensing signal comprises:
performing a high pass operation upon the variation of the f

Assignees

• Mediatek Inc

Inventors

• Luo Yan-Bin
• Hung Chih-Chien

Classifications

• G05F1/46

  wherein the variable actually regulated by the final control device is DC (G05F1/625 takes precedence) · CPC title

• G05F1/59 Primary

  including plural semiconductor devices as final control devices for a single load · CPC title

• G05F1/56

  using semiconductor devices in series with the load as final control devices (G05F1/461 takes precedence) · CPC title