Apparatus and method for monitoring operation of an insulated gate bipolar transistor

Patent metadata

Field	Value
Publication number	US-9664729-B2
Application number	US-201313882710-A
Country	US
Kind code	B2
Filing date	Jan 9, 2013
Priority date	Jan 9, 2013
Publication date	May 30, 2017
Grant date	May 30, 2017

Abstract

Operation of an insulated gate bipolar transistor (IGBT) is monitored by an apparatus that has a capacitor connected between a collector of the IGBT and an input node. A processing circuit, coupled to the input node, responds to current flowing through the capacitor by providing an indication whether a voltage level at the collector is changing and the rate of that change. The processing circuit also employs the capacitor current to provide an output voltage that indicates the voltage at the IGBT collector.

First claim

The invention claimed is:

1. A monitoring apparatus comprising:
a transistor that has an emitter, a collector and a gate, wherein a potential applied to the gate controls a conduction path between the emitter and the collector;
a capacitor having a first terminal connected to the collector and a second terminal connected to an input node of the apparatus;
a processing circuit, coupled to the input node, including a first current mirror with a first polarity and a second current mirror with a second polarity opposite the first polarity, the processing circuit configured to detect current flowing through the capacitor and generate a first signal indicating whether voltage level at the collector is increasing and a second signal indicating whether voltage level at the collector is decreasing.

2. The apparatus of claim 1 , wherein the first and second signals are binary signals.

3. The apparatus of claim 1 , wherein the processing circuit is configured to respond to current flowing through the capacitor by producing a signal indicating the voltage level at the collector.

4. The apparatus of claim 1 , wherein the processing circuit is configured to respond to current flowing through the capacitor by producing a signal indicating a rate at which the voltage level at the collector is changing.

5. The apparatus of claim 1 , wherein the processing circuit is configured to respond to current flowing through the capacitor by producing a signal indicating a rate at which the voltage level at the collector is changing and whether the voltage level is increasing or decreasing.

6. The apparatus of claim 1 , wherein the processing circuit is configured to respond to current flowing through the capacitor by generating a signal indicating the voltage level at the collector is greater than a voltage level across the transistor in a non-conductive state.

7. The apparatus of claim 1 , wherein the processing circuit generates a signal indicating a magnitude of current flowing through the capacitor.

8. The apparatus of claim 1 , wherein the processing circuit produces a third signal indicating an amount of current flowing from the capacitor to the rectifier and a fourth signal indicating an amount of current flowing from the rectifier to the capacitor.

9. The apparatus of claim 8 , wherein the processing circuit further comprises a voltage change detector that receives the third and fourth signals and responds thereto by producing the first indication whether a voltage level at the collector is changing.

10. The apparatus of claim 8 , wherein the processing circuit further comprises a voltage indicator that receives the third and fourth signals from the rectifier and responds thereto by producing an output voltage that indicates the voltage level at the collector.

11. The apparatus of claim 10 , wherein the output voltage is proportional to the voltage level at the collector.

12. The apparatus of claim 8 , wherein the processing circuit further comprises a voltage change rate indicator that receives the third and fourth signals from the rectifier and responds thereto by producing an output current that indicates a rate of change of the voltage level at the collector.

13. The apparatus of claim 8 , wherein the processing circuit comprises a voltage change rate indicator that receives the third and fourth signals from the rectifier and responds thereto by producing an output current that indicates a rate at which the voltage level at the collector is changing and whether the voltage level is increasing or decreasing.

14. An apparatus for monitoring operation of a transistor that has an emitter, a collector and a gate, wherein a potential applied to the gate controls a conduction path between the emitter and the collector, said apparatus comprising:
a capacitor external to the transistor and having a first terminal connected to the collector and a second terminal connected to an input node of the apparatus;
a rectifier having a first current mirror and producing a first signal indicating an amount of current flowing from the capacitor into the rectifier and a second current mirror and producing a second signal indicating an amount of current flowing from the rectifier to the capacitor; and
a voltage change detector that receives the first and second signals and responds thereto by producing an output signal indicating whether a voltage level at the collector is changing.

15. The apparatus of claim 14 , further comprising a collector voltage indicator that receives the first and second signals and responds thereto by producing an output voltage that indicates the voltage level at the collector.

16. The apparatus of claim 14 , further comprising a voltage change rate indicator that receives the first and second signals and responds thereto by producing an output current that indicates a rate of change of the voltage level at the collector.

17. A method for monitoring operation of a transistor that has an emitter, a collector and a gate, wherein a potential applied to the gate controls a conduction path between the emitter and the collector, said apparatus comprising:
providing a capacitor external to the transistor and having a first terminal connected to the collector and a second terminal connected to a monitor circuit having a first current mirror and a second current mirror;
producing a first signal from the first current mirror indicating an amount of current flowing from the capacitor into the monitor circuit and producing a second signal indicating an amount of current flowing from the monitor circuit to the capacitor; and
in response to detecting flow of current, providing a first indication whether a voltage level at the collector is changing.

18. The method of claim 17 , further comprising in response to detecting flow of current, providing a second indication of the voltage level at the collector.

19. The method of claim 17 , further comprising in response to detecting flow of current, providing a third indication of a rate at which the voltage level at the collector is changing.

20. The method of claim 17 , further comprising applying a bias voltage to the gate of the transistor; and varying the bias voltage in response to detecting flow of current through the capacitor.

Assignees

• Gray Randall C
• Kandah Ibrahim S
• Perruchoud Philipe J
• Pigott John M
• Sicard Thierry
• Nxp Usa Inc

Inventors

• Gray Randall C
• Kandah Ibrahim S
• Perruchoud Philipe J
• Pigott John M
• Sicard Thierry

Classifications

• G01R31/3274

  Details related to measuring, e.g. sensing, displaying or computing; Measuring of variables related to the contact pieces, e.g. wear, position or resistance (measuring contact resistance G01R27/205) · CPC title

• G01R31/261

  for measuring break-down voltage or punch through voltage therefor · CPC title

• H01H9/00

  Details of switching devices, not covered by groups H01H1/00 - H01H7/00 · CPC title

• G01R31/2608 Primary

  for testing bipolar transistors · CPC title