Package substrate comprising capacitor, redistribution layer and discrete coaxial connection

Patent metadata

Field	Value
Publication number	US-9659850-B2
Application number	US-201414563854-A
Country	US
Kind code	B2
Filing date	Dec 8, 2014
Priority date	Dec 8, 2014
Publication date	May 23, 2017
Grant date	May 23, 2017

Abstract

A package substrate that includes a first portion and a redistribution portion. The first portion is configured to operate as a capacitor. The first portion includes a first dielectric layer, a first set of metal layers in the dielectric layer, a first via in the dielectric layer, a second set of metal layers in the dielectric layer, and a second via in the dielectric layer. The first via is coupled to the first set of metal layers. The first via and the first set of metal layers are configured to provide a first electrical path for a ground signal. The second via is coupled to the second set of metal layers. The second via and the second set of metal layers are configured to provide a second electrical path for a power signal. The redistribution portion includes a second dielectric layer, and a set of interconnects.

First claim

What is claimed is:

1. A package substrate comprising:
a first dielectric layer;
a first set of metal layers in the dielectric layer;
a first via in the dielectric layer, the first via coupled to the first set of metal layers, wherein the first via and the first set of metal layers are configured to provide a first electrical path for a ground signal;
a second set of metal layers in the dielectric layer; and
a second via in the first dielectric layer, wherein a combination of the second via and at least a portion of the first set of metal layers is configured as a discrete coaxial connection in the package substrate, wherein the second via is configured to provide a second electrical path for an input/output (I/O) signal, and the second via traverses the first set of metal layers with a circumferential edge of the first set of metal layers adjacent to and surrounding the second via, and the second via traverses the second set of metal layers with a circumferential edge of the second set of metal layers adjacent to and surrounding the second via, wherein the circumferential edge of the first set of metal layers adjacent to and surrounding the second via is at least a first spacing away from the second via, and the circumferential edge of the second set of metal layers adjacent to and surrounding the second via is at least a second spacing away from the second via, the second spacing is different in dimension than the first spacing.

2. The package substrate of claim 1 , further comprising a third via configured to provide a third electrical path for a power signal.

3. The package substrate of claim 1 , wherein the package substrate is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

4. A package substrate comprising:
a capacitive means comprising (i) a first electrical path means comprising a first via and a first set of metal layers, the first electrical path means configured to provide a first electrical path for a ground signal, and (ii) a second electrical path means comprising a second via and a second set of metal layers, the second electrical path means configured to provide a second electrical path for a power signal; and
a redistribution portion coupled to the capacitive means, the redistribution portion comprising:
a dielectric layer; and
a set of interconnects; and

a third via configured to provide a third electrical path for an input/output (I/O) signal, wherein the third via traverses the first set of metal layers and the second set of metal layers, and the first set of metal layers includes a circumferential edge adjacent to and surrounding the third via, and the second set of metal layers include a circumferential edge adjacent to and surrounding the third via, and wherein the circumferential edge of the first set of metal layers adjacent to and surrounding the third via is at least a first spacing away from the third via, and the circumferential edge of the second set of metal layers adjacent to and surrounding the third via is at least a second spacing away from the third via, the second spacing is different in dimension than the first spacing.

5. The package substrate of claim 4 , wherein the third via is part of a discrete coaxial connection means configured to provide the third electrical path.

6. The package substrate of claim 4 , wherein a die is coupled to the package substrate.

7. The package substrate of claim 4 , wherein the package substrate is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

8. A package substrate comprising:
a first portion configured to operate as a capacitor, the first portion comprising:
a first dielectric layer;
a first set of metal layers in the dielectric layer;
a first via in the dielectric layer, the first via coupled to the first set of metal layers, wherein the first via and the first set of metal layers are configured to provide a first electrical path for a ground signal;
a second set of metal layers in the dielectric layer;
a second via in the dielectric layer, the second via coupled to the second set of metal layers, wherein the second via and the second set of metal layers are configured to provide a second electrical path for a power signal; and
a third via configured to provide a third electrical path for an input/output (I/O) signal, wherein the third via traverses the first set of metal layers and the second set of metal layers, and the first set of metal layers includes a circumferential edge adjacent to and surrounding the third via, and the second set of metal layers includes a circumferential edge adjacent to and surrounding the third via, wherein the circumferential edge of the first set of metal layers adjacent to and surrounding the third via is at least a first spacing away from the third via, and the circumferential edge of the second set of metal layers adjacent to and surrounding the third via is at least a second spacing away from the third via, the second spacing is different in dimension than the first spacing; and
a redistribution portion coupled to the first portion, the redistribution portion comprising:
a second dielectric layer; and
a set of interconnects.

9. The package substrate of claim 8 , wherein a combination of the third via and at least a portion of the first set of metal layers is configured as a discrete coaxial connection in the first portion.

10. The package substrate of claim 9 , wherein the second spacing is greater than the first spacing.

11. The package substrate of claim 8 , wherein the first dielectric layer includes a ceramic material.

12. The package substrate of claim 8 , wherein a die is coupled to the package substrate.

13. The package substrate of claim 8 , wherein the package substrate is incorporated into at least one of a music player, a video player, an entertainment unit, a navigation device, a communications device, a mobile device, a mobile phone, a smartphone, a personal digital assistant, a fixed location terminal, a tablet computer, and/or a laptop computer.

14. A method for fabricating a package substrate comprising a capacitor, the method comprising:
forming a first portion configured as the capacitor, wherein forming the first portion comprises:
forming a first dielectric layer;
forming a first set of metal layers in the dielectric layer;
forming a first electrical path for a ground signal, wherein forming the first electrical path for a ground signal comprises forming a first via in the dielectric layer, and coupling the first via to the first set of metal layers;
forming a second set of metal layers in the dielectric layer; and
forming a second electrical path for a power signal, wherein forming the second electrical path for the power signal further comprises forming a second via in the dielectric layer and coupling the second via to the second set of metal layers;
forming a third via configured to provide a third electrical path for an input/output (I/O) signal, wherein the third via traverses the first set of metal layers and the second set of metal layers, and the first set of metal layers includes a circumferential edge adjacent to and surrounding the third via, and the second set of metal layers include a circumferential edge ad

Assignees

• Qualcomm Inc

Inventors

• We Hong Bok
• Hwang Kyu-Pyung
• Song Young Kyu
• Kim Dong Wook

Classifications

• H10W90/734

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/728

  between a chip and a stacked discrete passive device, e.g. resistors, capacitors or inductors · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W74/15

  on active surfaces of flip-chip devices, e.g. underfills · CPC title

• H10W72/072

  of bump connectors · CPC title