Tin based p-type oxide semiconductor and thin film transistor applications

US9647135B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9647135-B2
Application numberUS-201514603186-A
CountryUS
Kind codeB2
Filing dateJan 22, 2015
Priority dateJan 22, 2015
Publication dateMay 9, 2017
Grant dateMay 9, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This disclosure provides p-type metal oxide semiconductor thin films that display good thin film transistor (TFT) characteristics. The p-type metal oxide thin films include ternary or higher order tin-based (Sn-based) p-type oxides such as Sn (II)-M-O oxides where M is a metal. In some implementations, M is a metal selected from the d block or the p block of the periodic table. The oxides disclosed herein exhibit p-type conduction and wide bandgaps. Also provided are TFTs including channels that include p-type oxide semiconductors, and methods of fabrication. In some implementations, the p-channel TFTs have low off-currents.

First claim

Opening claim text (preview).

What is claimed is: 1. An apparatus comprising a thin film transistor (TFT), the TFT comprising: a source electrode; a drain electrode; and a semiconductor channel connecting the source electrode and the drain electrode, the semiconductor channel including a ternary or higher order tin-based (Sn-based) p-type oxide, wherein the ternary or higher order Sn-based p-type oxide comprises Sn (II). 2. The apparatus of claim 1 , wherein the ternary or higher order Sn-based p-type oxide comprises a metal selected from the d block or the p block of the periodic table. 3. The apparatus of claim 1 , wherein the ternary or higher order Sn-based p-type oxide comprises one or more metals selected from the group consisting of Group 3 metals, Group 4 metals, tungsten (W), boron (B), niobium (Nb), aluminum (Al), gallium (Ga), lead (Pb), and silicon (Si). 4. The apparatus of claim 1 , wherein the Sn-based p-type oxide is a Sn-M-O ternary oxide, where Sn is Sn (II) and M is a metal selected from the d block or the p block of the periodic table. 5. The apparatus of claim 4 , wherein the Sn-M-O ternary oxide has the formula SnxM1-xOz, wherein x is at least 0.2 and z is greater than zero. 6. The apparatus of claim 5 , wherein x is between 0.2 and 0.8. 7. The apparatus of claim 1 , wherein the Sn-based p-type oxide is Sn (II)xB1-xOz, where x is between 0.7 and 0.9 and z is greater than zero. 8. The apparatus of claim 1 , wherein Sn-based p-type oxide is selected from the group consisting of Sn (II)xW1-xOz, Sn (II)xTi1-xOz and Sn (II)xNb1-xOz, where x is between 0.3 and 0.8 and z is greater than zero. 9. The apparatus of claim 1 , wherein the Sn-based p-type oxide is amorphous. 10. The apparatus of claim 1 , wherein the Sn-based p-type oxide has contributions from the Sn 5s orbital in its valence band maximum (VBM). 11. The apparatus of claim 1 , wherein the TFT is part of a complementary metal-oxide-semiconductor (CMOS) TFT device. 12. The apparatus of claim 1 , wherein the TFT is a bottom gate TFT. 13. The apparatus of claim 1 , wherein the TFT is a top gate TFT. 14. The apparatus of claim 1 , further comprising: a display; a processor that is configured to communicate with the display, the processor being configured to process image data; and a memory device that is configured to communicate with the processor. 15. The apparatus of claim 14 , further comprising: a driver circuit configured to send at least one signal to the display; and a controller configured to send at least a portion of the image data to the driver circuit. 16. The apparatus of claim 15 , wherein the driver circuit includes the TFT. 17. The apparatus of claim 14 , further comprising: an image source module configured to send the image data to the processor, wherein the image source module includes at least one of a receiver, transceiver, and transmitter. 18. The apparatus of claim 14 , further comprising: an input device configured to receive input data and to communicate the input data to the processor. 19. The apparatus of claim 1 , wherein the ternary or higher order Sn-based p-type oxide comprises one or more metals selected from the group consisting of tungsten (W), titanium (Ti), niobium (Nb), boron (B), lead (Pb), and silicon (Si). 20. An apparatus comprising a thin film transistor (TFT), the TFT comprising: a source electrode; a drain electrode; and a semiconductor channel connecting the source electrode and the drain electrode, the semiconductor channel including a ternary or higher order tin-based (Sn-based) p-type oxide, wherein the Sn-based p-type oxide is a Sn-M1-M2-O quaternary oxide, where Sn is Sn (II) and M1 and M2 are metals selected from the d block or the p block of the periodic table. 21. A method, comprising: providing a substrate; forming a ternary or higher order tin-based (Sn-based) p-type oxide semiconductor layer on the substrate, wherein the ternary or higher order Sn-based p-type oxide comprises Sn (II); and annealing the Sn-based p-type oxide semiconductor layer. 22. The method of claim 21 , wherein the ternary or higher order Sn-based p-type oxide a metal selected from the d block or the p block of the periodic table. 23. The method of claim 21 , wherein the ternary or higher order Sn-based p-type oxide one or more metals selected from the group consisting of Group 3 metals, Group 4 metals, tungsten (W), boron (B), niobium (Nb), aluminum (Al), gallium (Ga), lead (Pb) and silicon (Si). 24. The method of claim 21 , wherein forming the Sn-based p-type oxide semiconductor layer comprises an atomic layer deposition (ALD) process. 25. The method of claim 21 , further comprising forming a gate electrode and a gate dielectric, wherein the gate dielectric is between the Sn-based p-type oxide semiconductor layer and the gate electrode. 26. An apparatus comprising a thin film transistor (TFT), the TFT comprising: a source electrode; a drain electrode; and a semiconductor channel connecting the source electrode and the drain electrode, the semiconductor channel including a ternary or higher order tin-based (Sn-based) p-type oxide, wherein the Sn-based p-type oxide is a Sn-M-O ternary oxide, where Sn is Sn (II) and M is a metal selected from the d block or the p block of the periodic table and wherein the Sn-M-O ternary oxide has the formula SnxM 1-x Oz, wherein x is at least 0.2 and z is greater than zero.

Assignees

Inventors

Classifications

  • Thermal treatments, e.g. annealing or sintering · CPC title

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • based on interferometric effect · CPC title

  • Details of the interface to the display terminal specific for a flat panel (suitable for both CRT and flat panel G09G5/006; specific for a CRT G09G1/167) · CPC title

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What does patent US9647135B2 cover?
This disclosure provides p-type metal oxide semiconductor thin films that display good thin film transistor (TFT) characteristics. The p-type metal oxide thin films include ternary or higher order tin-based (Sn-based) p-type oxides such as Sn (II)-M-O oxides where M is a metal. In some implementations, M is a metal selected from the d block or the p block of the periodic table. The oxides discl…
Who is the assignee on this patent?
Snaptrack Inc
What technology area does this patent fall under?
Primary CPC classification H10D99/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 09 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 3 related publications on this page (citations in our corpus or others sharing the same primary CPC).