Semiconductor device

Patent metadata

Field	Value
Publication number	US-9647128-B2
Application number	US-201414505004-A
Country	US
Kind code	B2
Filing date	Oct 2, 2014
Priority date	Oct 10, 2013
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

To suppress a change in electrical characteristics and to improve reliability in a semiconductor device using a transistor including an oxide semiconductor. The semiconductor device includes a gate electrode over an insulating surface, an oxide semiconductor film overlapping with the gate electrode, a gate insulating film which is between the gate electrode and the oxide semiconductor film and is in contact with a surface of the oxide semiconductor film, a protective film in contact with an opposite surface of the surface of the oxide semiconductor film, and a pair of electrodes in contact with the oxide semiconductor film. In the gate insulating film or the protective film, the amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than the amount of nitrogen oxide released by heat treatment.

First claim

The invention claimed is:

1. A semiconductor device comprising:
an oxide semiconductor layer and a gate electrode overlapping with each other,
a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;
a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and
a pair of electrodes in electrical contact with the oxide semiconductor layer,
wherein the protective layer contains silicon and oxygen,
wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×10 17 spins/cm 3 and less than 1×10 18 spins/cm 3 , and
wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of nitrogen oxide released by the heat treatment.

2. The semiconductor device according to claim 1 ,
wherein at least one of an amount of gas having a mass-to-charge ratio m/z of 30 released by the heat treatment and an amount of gas having a mass-to-charge ratio m/z of 46 released by the heat treatment is less than or equal to a detection limit in the region, and
wherein the amount of the gas having the mass-to-charge ratio m/z of 17 released by the heat treatment is greater than or equal to 1×10 18 molecules/cm 3 and less than or equal to 5×10 19 molecules/cm 3 in the region.

3. The semiconductor device according to claim 2 ,
wherein the gas having the mass-to-charge ratio m/z of 30 comprises nitrogen monoxide,
wherein the gas having the mass-to-charge ratio m/z of 46 comprises nitrogen dioxide, and
wherein the gas having the mass-to-charge ratio m/z of 17 comprises ammonia.

4. The semiconductor device according to claim 1 , wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966.

5. The semiconductor device according to claim 4 , wherein a split width of the first signal and the second signal and a split width of the second signal and the third signal measured by electron spin resonance spectroscopy using an X-band are each 5 mT.

6. The semiconductor device according to claim 4 , wherein the first signal, the second signal, and the third signal are attributed to nitrogen oxide.

7. The semiconductor device according to claim 6 , wherein the nitrogen oxide includes at least one of nitrogen monoxide and nitrogen dioxide.

8. The semiconductor device according to claim 1 ,
wherein the gate electrode is over an insulating surface, and
wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

9. The semiconductor device according to claim 1 ,
wherein the gate electrode is over an insulating surface, and
wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

10. A semiconductor device comprising:
an oxide semiconductor layer and a gate electrode overlapping with each other,
a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;
a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and
a pair of electrodes in electrical contact with the oxide semiconductor layer,
wherein the protective layer contains silicon and oxygen,
wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×10 17 spins/cm 3 and less than 1×10 18 spins/cm 3 ,
wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966, and
wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of gas having a mass-to-charge ratio m/z of 30 released by the heat treatment.

11. The semiconductor device according to claim 10 ,
wherein the gate electrode is over an insulating surface, and
wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

12. The semiconductor device according to claim 10 ,
wherein the gate electrode is over an insulating surface, and
wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

13. A semiconductor device comprising:
an oxide semiconductor layer and a gate electrode overlapping with each other,
a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gate insulating layer being in contact with a first surface of the oxide semiconductor layer;
a protective layer in contact with a second surface of the oxide semiconductor layer, the second surface being on a side opposite to the first surface; and
a pair of electrodes in electrical contact with the oxide semiconductor layer,
wherein the protective layer contains silicon and oxygen,
wherein the protective layer comprises a portion whose spin density measured by electron spin resonance spectroscopy is greater than or equal to 1×10 17 spins/cm 3 and less than 1×10 18 spins/cm 3 ,
wherein an electron spin resonance spectrum of the portion has a first signal that appears at a g-factor in a range greater than or equal to 2.037 and less than or equal to 2.039, a second signal that appears at a g-factor in a range greater than or equal to 2.001 and less than or equal to 2.003, and a third signal that appears at a g-factor in a range greater than or equal to 1.964 and less than or equal to 1.966, and
wherein the protective layer includes a region where an amount of gas having a mass-to-charge ratio m/z of 17 released by heat treatment is greater than an amount of gas having a mass-to-charge ratio m/z of 46 released by the heat treatment.

14. The semiconductor device according to claim 13 ,
wherein the gate electrode is over an insulating surface, and
wherein the protective layer, the oxide semiconductor layer, and the gate insulating layer are between the insulating surface and the gate electrode.

15. The semiconductor device according to claim 13 ,
wherein the gate electrode is over an insulating surface, and
wherein the gate electrode and the gate insulating layer are between the insulating surface and the oxide semiconductor layer.

16. A semiconductor device comprising:
a transistor comprising:
an oxide semiconductor layer and a gate electrode overlapping with each other,
a gate insulating layer between the gate electrode and the oxide semiconductor layer, the gat

Assignees

• Semiconductor Energy Lab

Inventors

• Yamazaki Shunpei
• Hosaka Yasuharu
• Obonai Toshimitsu
• Koezuka Junichi
• Shima Yukinori
• Hayakawa Masahiko
• Hamochi Takashi
• Hiraishi Suzunosuke

Classifications

• H10P14/2914

  Oxides · CPC title

• H10P14/68

  Organic materials, e.g. photoresists · CPC title

• H10D64/011

  of electrodes ohmically coupled to a semiconductor · CPC title

• H10P95/90 Primary

  Thermal treatments, e.g. annealing or sintering · CPC title

• H10D62/875

  being semiconductor metal oxide, e.g. InGaZnO (Group II-VI materials H10D62/86; Group I-VI materials H10D62/871; Pb compounds or alloys H10D62/874) · CPC title