Nanoscale chemical templating with oxygen reactive materials

US9647063B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9647063-B2
Application numberUS-201514797945-A
CountryUS
Kind codeB2
Filing dateJul 13, 2015
Priority dateJan 29, 2010
Publication dateMay 9, 2017
Grant dateMay 9, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another embodiment, patterning of a compound semiconductor substrate or other like substrate which is capable of forming a compound semiconductor alloy with an oxygen reactive element during a subsequent annealing step is provided. This embodiment provides a patterned substrate that can be used in various applications including, for example, in semiconductor device manufacturing, optoelectronic device manufacturing and solar cell device manufacturing.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor substrate comprising: a semiconductor substrate having at least one area including an island of oxygen reactive element-containing compound semiconductor alloy, and at least one other area including an oxygen reactive element-containing compound oxide layer, said at least one other area including the oxygen reactive element-containing compound oxide layer is laterally abutting said at least one area including said island of oxygen reactive element-containing semiconductor alloy, wherein a bottommost surface of said oxygen reactive element-containing compound oxide layer is in direct physical contact with a topmost surface of an oxide portion. 2. The semiconductor structure of claim 1 , wherein said semiconductor substrate comprises a semiconductor material selected from a III-V compound semiconductor and a II-VI compound semiconductor. 3. The semiconductor structure of claim 1 , wherein a sidewall of said oxygen reactive element-containing compound oxide layer directly contacts a sidewall portion of said island of oxygen reactive element-containing compound semiconductor alloy. 4. The semiconductor structure of claim 1 , wherein said oxygen reactive element-containing compound oxide material contains an element selected from Al, In, Ga, Ti, Mg, Ca and Sn. 5. The semiconductor structure of claim 1 , wherein said oxygen reactive element-containing compound semiconductor alloy comprises a semiconductor material and an oxygen reactive element. 6. The semiconductor structure of claim 5 , wherein said semiconductor material is Ga and said and an oxygen reactive element is Al. 7. The semiconductor structure of claim 1 , wherein said oxygen reactive element-containing compound oxide layer is separated from said semiconductor substrate by a patterned oxide layer. 8. The semiconductor structure of claim 7 , wherein said oxygen reactive element-containing compound semiconductor alloy has a topmost surface that is located between a topmost surface and a bottommost surface of said patterned oxide layer. 9. The semiconductor structure of claim 8 , wherein a portion of a sidewall of said island of oxygen reactive element-containing compound semiconductor alloy directly contacts a sidewall of said patterned oxide layer. 10. The semiconductor structure of claim 7 , wherein said patterned oxide layer comprises a semiconductor oxide. 11. The semiconductor structure of claim 7 , wherein said patterned oxide comprises a metal oxide. 12. The semiconductor structure of claim 11 , wherein said metal oxide is selected from the group consisting of ZnO, NiO, HfO 2 , ZrO 2 , La 2 O 3 , Al 2 O 3 , TiO 2 , SrTiO 3 , LaAlO 3 , Y 2 O 3 , HfO x N y , ZrO x N y , La 2 O x N y , Al 2 O x N y , TiO x N y , SrTiO x N y , LaAlO x N y , and Y 2 O x N y , wherein each value of x is independently from 0.5 to 3 and each value of y is independently from 0 to 2. 13. The semiconductor structure of claim 1 , wherein said oxygen reactive element-containing compound semiconductor alloy comprises GaAlAs. 14. A semiconductor substrate comprising: a semiconductor substrate having at least one area including an island of oxygen reactive element-containing compound semiconductor alloy, and at least one other area including an oxygen reactive element-containing compound oxide layer, said at least one other area including the oxygen reactive element-containing compound oxide layer is laterally abutting said at least one area including said island of oxygen reactive element-containing semiconductor alloy, wherein a bottommost surface of said island of oxygen reactive element-containing compound semiconductor alloy is located beneath a topmost surface of said semiconductor substrate. 15. A semiconductor structure comprising: a semiconductor substrate having at least one area including an island of oxygen reactive element-containing compound semiconductor alloy, and at least one other area including an oxygen reactive element-containing compound oxide layer, said at least one other area including the oxygen reactive element-containing compound oxide layer is laterally abutting said at least one area including said island of oxygen reactive element-containing semiconductor alloy, wherein said oxygen reactive element-containing compound oxide layer is separated from said semiconductor substrate by a patterned oxide layer.

Assignees

Inventors

Classifications

  • Generic processes or apparatus for manufacture or treatments not covered by the other groups of this subclass · CPC title

  • of semiconductor materials · CPC title

  • using chemical vapour deposition [CVD] · CPC title

  • Vapour-liquid-solid growth · CPC title

  • using seed materials · CPC title

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Frequently asked questions

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What does patent US9647063B2 cover?
A method of fabricating templated semiconductor nanowires on a surface of a semiconductor substrate for use in semiconductor device applications is provided. The method includes controlling the spatial placement of the semiconductor nanowires by using an oxygen reactive seed material. The present invention also provides semiconductor structures including semiconductor nanowires. In yet another …
Who is the assignee on this patent?
Globalfoundries Inc, King Abdulaziz City Sci & Tech
What technology area does this patent fall under?
Primary CPC classification H10P14/3411. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 09 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).