Semiconductor device and manufacturing method thereof

Patent metadata

Field	Value
Publication number	US-9647010-B2
Application number	US-201314141806-A
Country	US
Kind code	B2
Filing date	Dec 27, 2013
Priority date	Dec 28, 2012
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

A semiconductor device with high aperture ratio is provided. The semiconductor device includes a transistor and a capacitor having a pair of electrodes. An oxide semiconductor layer formed over the same insulating surface is used for a channel formation region of the transistor and one of the electrodes of the capacitor. The other electrode of the capacitor is a transparent conductive film. One electrode of the capacitor is electrically connected to a wiring formed over the insulating surface over which a source electrode or a drain electrode of the transistor is provided, and the other electrode of the capacitor is electrically connected to one of the source electrode and the drain electrode of the transistor.

First claim

The invention claimed is:

1. A semiconductor device comprising:
a transistor over an insulating surface, the transistor including:
an oxide semiconductor layer over a first insulating film;
a source electrode layer and a drain electrode layer which are on and in contact with the oxide semiconductor layer and the insulating surface;
a second insulating film over the oxide semiconductor layer, the source electrode layer, and the drain electrode layer; and
a gate electrode layer over the oxide semiconductor layer with the second insulating film therebetween;

a capacitor, the capacitor including:
a first electrode in the same layer as the oxide semiconductor layer, the first electrode being located over the first insulating film;
a transparent conductive film as a second electrode of the capacitor, the transparent conductive film overlapping the first electrode; and
a dielectric between the first electrode and the second electrode; and

a wiring on and in contact with the insulating surface and the first electrode which is formed using the same material as the source electrode layer and the drain electrode layer,
wherein the first electrode includes the same material as the oxide semiconductor layer.

2. The semiconductor device according to claim 1 , further comprising:
wherein the source electrode layer, the drain electrode layer, and the wiring are formed from a same layer.

3. The semiconductor device according to claim 1 , further comprising:
a third insulating film over the second insulating film and the gate electrode layer; and
a fourth insulating film over the third insulating film,
wherein the second insulating film, the third insulating film, and the fourth insulating film overlap the first electrode, and
wherein the dielectric includes the second insulating film, the third insulating film, and the fourth insulating film.

4. The semiconductor device according to claim 3 ,
wherein the third insulating film has a single-layer structure or a layered structure including an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—Zn-based metal oxide.

5. The semiconductor device according to claim 3 ,
wherein the fourth insulating film has a single-layer structure or a layered structure including a nitride insulating material selected from silicon nitride oxide, silicon nitride, aluminum nitride, and aluminum nitride oxide.

6. The semiconductor device according to claim 1 , further comprising:
a third insulating film over the second insulating film and the gate electrode layer, the third insulating film being in contact with the first electrode; and
a fourth insulating film over the third insulating film,
wherein the third insulating film and the fourth insulating film overlap the first electrode, and
wherein the dielectric includes the third insulating film and the fourth insulating film.

7. The semiconductor device according to claim 1 , further comprising:
a third insulating film over the second insulating film and the gate electrode layer; and
a fourth insulating film over the third insulating film, the fourth insulating film being in contact with the first electrode,
wherein the fourth insulating film overlaps the first electrode, and
wherein the dielectric includes the fourth insulating film.

8. The semiconductor device according to claim 1 , further comprising a nitride insulating film between the first insulating film and the first electrode, the nitride insulating film being in contact with the first electrode.

9. The semiconductor device according to claim 1 ,
wherein the first electrode and the oxide semiconductor layer include indium, zinc and gallium.

10. The semiconductor device according to claim 1 ,
wherein the first electrode includes one or more elements selected from hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and a rare gas element.

11. The semiconductor device according to claim 1 ,
wherein the oxide semiconductor layer has an energy gap of 2.0 eV or more.

12. The semiconductor device according to claim 1 ,
wherein the transparent conductive film is electrically connected to one of the source electrode layer and the drain electrode layer.

13. A method for manufacturing a semiconductor device, comprising the steps of:
forming an oxide semiconductor film over a first insulating film;
patterning the oxide semiconductor film so that a first oxide semiconductor layer and a second oxide semiconductor layer are formed;
forming a conductive film over the first oxide semiconductor layer and the second oxide semiconductor layer;
patterning the conductive film so that a source electrode layer and a drain electrode layer which are electrically connected to the first oxide semiconductor layer and a wiring electrically connected to the second oxide semiconductor layer are formed;
forming a second insulating film over the first insulating film, the first oxide semiconductor layer, the second oxide semiconductor layer, the source electrode layer, the drain electrode layer, and the wiring;
forming a gate electrode layer overlapping the first oxide semiconductor layer with the second insulating film therebetween;
forming a third insulating film over the second insulating film and the gate electrode layer;
forming a fourth insulating film over the third insulating film;
forming an opening in the second insulating film, the third insulating film, and the fourth insulating film so as to reach the source electrode layer or the drain electrode layer; and
forming a transparent conductive film over the fourth insulating film so as to be electrically connected to the source electrode layer or the drain electrode layer through the opening,
wherein a capacitor includes a first electrode formed by the second oxide semiconductor layer and the transparent conductive film serves as a second electrode of the capacitor.

14. The method according to claim 13 ,
wherein the second insulating film, the third insulating film, and the fourth insulating film serve as a dielectric of the capacitor.

15. The method according to claim 13 , further comprising the step of etching a part of the second insulating film which overlaps the second oxide semiconductor layer so that the third insulating film and the fourth insulating film serve as a dielectric of the capacitor.

16. The method according to claim 13 , further comprising the step of etching a part of the second insulating film and a part of the third insulating film which overlap the second oxide semiconductor layer so that the fourth insulating film serves as a dielectric of the capacitor.

17. The method according to claim 13 ,
wherein the first oxide semiconductor layer and the second oxide semiconductor layer have an energy gap of 2.0 eV or more.

18. The method according to claim 13 , further comprising the step of adding one or more kinds of dopant selected from hydrogen, boron, nitrogen, fluorine, aluminum, phosphorus, arsenic, indium, tin, antimony, and a rare gas element to the second oxide semiconductor layer.

19. The method according to claim 13 ,
wherein the third insulating film has a single-layer structure or a layered structure including an oxide insulating material selected from silicon oxide, silicon oxynitride, aluminum oxide, hafnium oxide, gallium oxide, and a Ga—Zn-based metal oxide.

20. The method according to claim 13 ,
wherein the fourth insulating film has a single-layer

Assignees

• Semiconductor Energy Lab

Inventors

• Endo Yuta

Classifications

• G02F1/1368

  in which the switching element is a three-electrode device {(G02F1/136277 takes precedence)} · CPC title

• H10D30/6755

  Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate · CPC title

• H01L27/1296

  Electricity · mapped topic

• H01L27/1255 Primary

  Electricity · mapped topic

• H01L27/1225

  Electricity · mapped topic