Thin film transistor substrate, method for manufacturing the same, and liquid crystal display panel

US9196742B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9196742-B2
Application numberUS-201113813839-A
CountryUS
Kind codeB2
Filing dateJul 28, 2011
Priority dateAug 4, 2010
Publication dateNov 24, 2015
Grant dateNov 24, 2015

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Abstract

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A TFT substrate ( 20 a ) includes a plurality of pixel electrodes ( 17 a ) provided in a matrix, a plurality of TFTs ( 5 ) each provided for a corresponding one of the pixel electrodes ( 17 a ), and a plurality of auxiliary capacitors ( 6 a ) each provided for a corresponding one of the pixel electrodes ( 17 a ). Each of the auxiliary capacitors ( 6 a ) includes a capacitor line ( 11 b ) made of a material identical to that of the gate electrode ( 11 aa ) of the TFT ( 5 ) and provided in a layer identical to that of the gate electrode ( 11 aa ) of the TFT ( 5 ), the gate insulating film ( 12 ) provided so as to cover the capacitor line ( 11 b ), and a corresponding one of the pixel electrodes ( 17 a ) provided on the gate insulating film ( 12 ) so as to overlap with the capacitor line ( 11 b ) and being in conduction with a drain electrode ( 14 ca ).

First claim

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The invention claimed is: 1. A thin film transistor substrate, comprising: a plurality of pixel electrodes provided in a matrix; a plurality of thin film transistors each provided for a corresponding one of the pixel electrodes and connected to the corresponding one of the pixel electrodes; and a plurality of auxiliary capacitors each provided for a corresponding one of the pixel electrodes, wherein each of the thin film transistors includes: a gate electrode provided on a…

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What does patent US9196742B2 cover?
A TFT substrate ( 20 a ) includes a plurality of pixel electrodes ( 17 a ) provided in a matrix, a plurality of TFTs ( 5 ) each provided for a corresponding one of the pixel electrodes ( 17 a ), and a plurality of auxiliary capacitors ( 6 a ) each provided for a corresponding one of the pixel electrodes ( 17 a ). Each of the auxiliary capacitors ( 6 a ) includes a capacitor line ( 1…
Who is the assignee on this patent?
Kanzaki Yohsuke, Saitoh Yuhichi, Nakatani Yoshiki, and 3 more
What technology area does this patent fall under?
Primary CPC classification H10D30/6755. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Nov 24 2015 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).