Spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy

Patent metadata

Field	Value
Publication number	US-9646670-B2
Application number	US-201615158658-A
Country	US
Kind code	B2
Filing date	May 19, 2016
Priority date	Feb 9, 2015
Publication date	May 9, 2017
Grant date	May 9, 2017

Abstract

Methods and apparatus relating to spin-orbit-torque magnetoresistive random access memory with voltage-controlled anisotropy are disclosed. In an example, disclosed is a three-terminal magnetic tunnel junction (MTJ) storage element that is programmed via a combination of voltage-controlled magnetic anisotropy (VCMA) and spin-orbit torque (SOT) techniques. Also disclosed is a memory controller configured to program the three-terminal MTJ storage element via VCMA and SOT techniques. The disclosed devices improve efficiency over conventional devices by using less write energy, while having a design that is simpler and more scalable than conventional devices. The disclosed devices also have increased thermal stability without increasing required switching current, as critical switching current between states is essentially the same.

First claim

What is claimed is:

1. A three-terminal spin-orbit-torque magnetoresistive memory (MRAM), comprising:
a bottom electrode formed from a substantially planar spin hall effect material, wherein the bottom electrode has a surface arranged to accumulate spin when a current is flowed through the substantially planar spin hall effect material; and
a magnetic tunnel junction (MTJ) stack formed over the bottom electrode, wherein the MTJ stack comprises:
an oxide barrier layer;
a free layer between the oxide barrier layer and the bottom electrode, wherein the spin accumulated on the surface of the bottom electrode when the current is flowed through the substantially planar spin hall effect material is configured to apply a spin-orbit torque to the free layer;
a top electrode; and
a reference layer between the oxide barrier layer and the top electrode.

2. The three-terminal spin-orbit-torque MRAM recited in claim 1 , wherein a bias voltage is applied across the MTJ stack to reduce a magnetic anisotropy at the free layer and a write voltage is applied across the substantially planar spin hall effect material while the bias voltage is applied across the MTJ stack to place the free layer in a target magnetic state.

3. The three-terminal spin-orbit-torque MRAM recited in claim 2 , wherein the top electrode comprises a first terminal arranged to have the bias voltage applied thereto such that the bias voltage is configured to induce an electric field across the oxide barrier layer and reduce an energy barrier to place the free layer in the target magnetic state.

4. The three-terminal spin-orbit-torque MRAM recited in claim 3 , wherein the bottom electrode comprises a second terminal arranged to have the write voltage applied thereto and a third terminal held at a low voltage such that the write voltage is configured to cause the current to flow through the substantially planar spin hall effect material and thereby place the free layer in the target magnetic state through spin torque transfer.

5. The three-terminal spin-orbit-torque MRAM recited in claim 4 , wherein the current causes the spin to accumulate on the surface of the bottom electrode such that the substantially planar spin hall effect material is configured to generate a spin current to place the free layer in the target magnetic state through the spin torque transfer.

6. The three-terminal spin-orbit-torque MRAM recited in claim 3 , wherein the induced electric field across the oxide barrier layer is configured to reduce the magnetic anisotropy at the free layer from a naturally-occurring anisotropy associated with the free layer.

7. The three-terminal spin-orbit-torque MRAM recited in claim 2 , wherein the reduced magnetic anisotropy at the free layer causes a reduction in a minimum current to switch the free layer between a parallel magnetic state and an antiparallel magnetic state.

8. The three-terminal spin-orbit-torque MRAM recited in claim 1 , wherein the bottom electrode is substantially perpendicular to the MTJ stack.

9. The three-terminal spin-orbit-torque MRAM recited in claim 8 , wherein the bottom electrode comprises a first terminal and a second terminal, wherein the top electrode comprises a third terminal, and wherein the MTJ stack is formed over the bottom electrode between the first terminal and the second terminal.

10. The three-terminal spin-orbit-torque MRAM recited in claim 9 , wherein a read voltage is applied to the third terminal while the first terminal and the second terminal are held at a low voltage such that the current does not flow through the bottom electrode that is substantially perpendicular to the MTJ stack and a resistance across the MTJ stack indicates a current magnetic state at the free layer.

11. A method for forming a three-terminal spin-orbit-torque magnetoresistive memory (MRAM), comprising:
forming a bottom electrode from a substantially planar spin hall effect material, wherein the bottom electrode has a surface arranged to accumulate spin when a current is flowed through the substantially planar spin hall effect material; and
forming a magnetic tunnel junction (MTJ) stack over the bottom electrode, wherein the MTJ stack comprises a top electrode, an oxide barrier layer, a free layer formed between the oxide barrier layer and the bottom electrode, and a reference layer formed between the oxide barrier layer and the top electrode, wherein the spin accumulated on the surface of the bottom electrode when the current is flowed through the substantially planar spin hall effect material is configured to apply a spin-orbit torque to the free layer.

12. The method recited in claim 11 , wherein the MTJ stack is formed to be substantially perpendicular to the bottom electrode.

13. The method recited in claim 11 , wherein the MTJ stack is arranged to induce an electric field across the oxide barrier layer and reduce a magnetic anisotropy at the free layer when a bias voltage is applied between the top electrode and the bottom electrode.

14. The method recited in claim 13 , wherein the magnetic anisotropy at the free layer is reduced from a naturally-occurring anisotropy associated with the free layer.

15. The method recited in claim 13 , wherein the reduced magnetic anisotropy at the free layer causes a reduction in a minimum current to switch the free layer between a parallel magnetic state and an antiparallel magnetic state.

16. The method recited in claim 11 , wherein the bottom electrode is arranged to generate a spin current to place the free layer in a target magnetic state via spin torque transfer when a write voltage is applied to cause the current to flow through the bottom electrode.

17. The method recited in claim 11 , wherein the substantially planar spin hall effect material is configure to flow the current through the bottom electrode in a first direction to place the free layer in a parallel magnetic state and to flow the current through the bottom electrode in a second direction to place the free layer in an antiparallel magnetic state.

18. The method recited in claim 11 , wherein the bottom electrode comprises a first terminal and a second terminal, wherein the top electrode comprises a third terminal, and wherein the MTJ stack is formed between the first terminal and the second terminal.

19. The method recited in claim 18 , wherein the third terminal is arranged to have a bias voltage applied thereto while a write voltage is applied to the first terminal and the second terminal is held at a low voltage to place the free layer in a target magnetic state.

20. The method recited in claim 18 , wherein the third terminal is arranged to have a read voltage applied thereto while the first terminal and the second terminal are held at a low voltage to determine a current magnetic state at the free layer.

Assignees

• Qualcomm Inc

Inventors

• Lee Kangho
• Kan Jimmy
• Kang Seung Hyuk

Classifications

• G11C11/1675 Primary

  Writing or programming circuits or methods · CPC title

• G11C11/161

  details concerning the memory cell structure, e.g. the layers of the ferromagnetic memory cell · CPC title

• G11C8/005

  with travelling wave access · CPC title

• G11C11/18

  using Hall-effect devices · CPC title

• H01L43/10

  Electricity · mapped topic