Controllable test-pulse width and position for self-test ground fault circuit interrupter

US9640975B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9640975-B2
Application numberUS-201414468224-A
CountryUS
Kind codeB2
Filing dateAug 25, 2014
Priority dateAug 27, 2013
Publication dateMay 2, 2017
Grant dateMay 2, 2017

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

A circuit interrupting device having an auto-monitoring circuit for periodically testing various functions and structures of the device. The auto-monitoring circuit initiates an auto-monitoring routine which, among other things, generates a self-test fault condition and determines whether the detection mechanisms within the device properly detect the self-test fault. A test fault circuit is configured to generate one or more test pulses that cause the self-test fault condition and the test pulses are generated to occur outside of an active region of the fault detection circuit.

First claim

Opening claim text (preview).

What is claimed is: 1. An electrical wiring device comprising: a fault detection circuit configured to detect real, simulated and test fault conditions; and a test fault circuit configured to generate one or more test pulses that cause said test fault condition, wherein said one or more test pulses are generated to occur outside of an active region of said fault detection circuit, and wherein said one or more test pulses occur approximately five milliseconds after a leading edge of a positive half-cycle of AC power, such that the one or more test pulses will not add to and will not subtract from a leakage current. 2. The electrical wiring device recited in claim 1 , wherein said one or more test pulses each has a pulsewidth that is less than 1 msec. 3. The electrical wiring device recited in claim 1 , wherein a leakage current is present in the active region. 4. The electrical wiring device recited in claim 1 , wherein said one or more test pulses are generated by a programmable device. 5. The electrical wiring device recited in claim 1 , wherein said one or more test pulses are generated so as to avoid a leakage current. 6. A circuit interrupting device comprising: one or more line conductors for electrically connecting to an external power supply; one or more load conductors for electrically connecting to an external load; an interrupting device connected to said line conductors and said load conductors and electrically connecting said line conductors to said load conductors when said circuit interrupting device is in a reset condition and disconnecting said line conductors from said load conductors when said circuit interrupting device is in a tripped condition; a fault detection circuit that detects a fault condition in said circuit interrupting device and generates a fault detection signal when said fault condition is detected, wherein said fault detection signal is provided to said interrupting device to place said circuit interrupting device in said tripped condition; an auto-monitoring circuit electrically coupled to said fault detection circuit and said interrupting device and continuously monitoring one or more signals to determine an operating state of said circuit interrupting device; and a test fault circuit configured to generate one or more test pulses that cause said test fault condition, wherein said one or more test pulses are generated to occur outside of an active region of said fault detection circuit, and wherein said one or more test pulses occur approximately five milliseconds after a leading edge of a positive half-cycle of AC power, such that the one or more test pulses will not add to and will not subtract from a leakage current. 7. The circuit interrupting device recited in claim 6 , wherein said fault detection circuit includes a sense transformer through which said line conductors are disposed, said sense transformer generating an induced fault detection signal when a net current exceeds a predetermined threshold. 8. The circuit interrupting device recited in claim 7 , wherein said self-test circuit includes a self-test conductor disposed through said sense transformer and separate from said line conductors and said net current is placed on said self-test conductor when said self-test circuit is controlled to generate said self-test signal. 9. An electrical wiring device comprising: a fault detection circuit configured to detect real, simulated and test fault conditions; a test fault circuit configured to generate one or more test pulses that cause said test fault condition, wherein said one or more test pulses are generated to occur outside of an active region of said fault detection circuit, wherein said test fault circuit includes a programmable device programmed to generate said one or more test pulses, such that said one or more test pulses occur approximately five milliseconds after a leading edge of a positive half-cycle of AC power, such that the one or more test pulses will not add to and will not subtract from a leakage current. 10. The electrical wiring device recited in claim 9 , wherein said one or more test pulses each has a pulsewidth that is less than 1 msec. 11. The electrical wiring device recited in claim 9 , wherein a leakage current is present in the active region. 12. The electrical wiring device recited in claim 9 , wherein said one or more test pulses are generated so as to avoid a leakage current.

Assignees

Inventors

Classifications

  • of low voltage devices, e.g. domestic or industrial devices, such as motor protections, relays, rotation switches · CPC title

  • the main function being self testing of the device · CPC title

  • H02H3/162Primary

    for AC systems · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9640975B2 cover?
A circuit interrupting device having an auto-monitoring circuit for periodically testing various functions and structures of the device. The auto-monitoring circuit initiates an auto-monitoring routine which, among other things, generates a self-test fault condition and determines whether the detection mechanisms within the device properly detect the self-test fault. A test fault circuit is con…
Who is the assignee on this patent?
Hubbell Inc
What technology area does this patent fall under?
Primary CPC classification H02H3/162. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 02 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).