Semiconductor device

US9640454B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9640454-B2
Application numberUS-201514933449-A
CountryUS
Kind codeB2
Filing dateNov 5, 2015
Priority dateJun 5, 2013
Publication dateMay 2, 2017
Grant dateMay 2, 2017

How to read this patent

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  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes an insulating substrate having a circuit plate on a principal surface thereof; a semiconductor element fixed to the circuit plate; an external terminal having one end fixed to the circuit plate; and a printed circuit board facing the principal surface of the insulating substrate, and having a through-hole for passing through the external terminal. A rigidity of a peripheral region of the through-hole is lower than a rigidity of other regions.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: an insulating substrate having a circuit plate on a principal surface thereof; a semiconductor element fixed to the circuit plate; an external terminal having one end fixed to the circuit plate; and a printed circuit board facing the principal surface of the insulating substrate, and having a through-hole for passing through the external terminal, wherein a rigidity of a peripheral region of the through-hole is lower than a rigidity of other regions. 2. The semiconductor device according to claim 1 , further comprising a post electrode, wherein the semiconductor element has an electrode on a front surface thereof, and the post electrode has one end fixed to the electrode of the semiconductor element and another end fixed to the printed circuit board. 3. The semiconductor device according to claim 1 , wherein the peripheral region is formed with a slit. 4. The semiconductor device according to claim 1 , wherein the peripheral region is formed with a plurality of slits. 5. The semiconductor device according to claim 4 , wherein the through-hole has a circular shape in a plan view, and the plurality of slits is formed radially at a uniform angle when viewed from the principal surface of the printed circuit board. 6. The semiconductor device according to claim 4 , wherein the through-hole has a polygonal shape in a plan view, and the plurality of slits is formed radially to extend from apexes of respective corners when viewed from the principal surface of the printed circuit board. 7. The semiconductor device according to claim 6 , wherein the polygonal shape is a quadrangular shape in the plan view. 8. The semiconductor device according to claim 1 , wherein the peripheral region of a surface of the printed circuit board facing the insulating substrate is formed with a chamfered portion. 9. A semiconductor device comprising: an insulating substrate having a circuit plate on a principal surface thereof; a semiconductor element fixed to the circuit plate; an external terminal having one end fixed to the circuit plate; and a printed circuit board facing the principal surface of the insulating substrate, and having a through-hole shaped in a polygonal shape in a plan view for passing the external terminal therethrough, wherein a plurality of slits is formed radially and symmetrically on a peripheral region of the through-hole to extend from apexes of respective corners of the through-hole when viewed from the principal surface of the printed circuit board, and a rigidity of the peripheral region of the through-hole is lower than a rigidity of other regions in the printed circuit board. 10. The semiconductor device according to claim 9 , wherein the polygonal shape is a quadrangular shape in the plan view, and the plurality of slits includes four slits, each extending from each apex of the quadrangular shape.

Assignees

Inventors

Classifications

  • Package configurations · CPC title

  • Insulating materials, e.g. resins, glasses or ceramics · CPC title

  • by a substrate and the encapsulations · CPC title

  • H10W72/00Primary

    Interconnections or connectors in packages · CPC title

  • Encapsulations, e.g. protective coatings · CPC title

Patent family

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Frequently asked questions

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What does patent US9640454B2 cover?
A semiconductor device includes an insulating substrate having a circuit plate on a principal surface thereof; a semiconductor element fixed to the circuit plate; an external terminal having one end fixed to the circuit plate; and a printed circuit board facing the principal surface of the insulating substrate, and having a through-hole for passing through the external terminal. A rigidity of a…
Who is the assignee on this patent?
Fuji Electric Co Ltd
What technology area does this patent fall under?
Primary CPC classification H10W72/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue May 02 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).