Wafer debonding using mid-wavelength infrared radiation ablation

Patent metadata

Field	Value
Publication number	US-9636782-B2
Application number	US-201414226966-A
Country	US
Kind code	B2
Filing date	Mar 27, 2014
Priority date	Nov 28, 2012
Publication date	May 2, 2017
Grant date	May 2, 2017

Abstract

Structures and methods are provided for temporarily bonding handler wafers to device wafers using bonding structures that include one or more releasable layers which are laser-ablatable using mid-wavelength infrared radiation.

First claim

We claim:

1. A method for handling a device wafer, comprising:
depositing a film of metal material on a surface of a silicon handler water to form a metal layer on the surface of the silicon handler wafer, wherein the metal layer serves as a releasable layer and has a thickness in a range of 5 nanometers to less than 100 nanometers;
forming a polymer adhesive layer on at least one of the metal layer and a surface of a device wafer;
bonding the device wafer to the silicon handler wafer using the polymer adhesive layer, wherein the device wafer and the silicon handler wafer are separate wafers;
processing the device wafer while bonded to the silicon handler wafer; and
debonding the device wafer and the silicon handler wafer by irradiating the metal layer with infrared energy through the silicon handler wafer to substantially or completely vaporize the metal layer such that the device wafer is released from the silicon handler wafer as a direct result of the substantial or complete vaporization of the metal layer,
wherein a wavelength of the infrared energy is in a range of about 1.12 μm to about 5 μm.

2. The method of claim 1 , wherein irradiating the bonding structure comprises:
directing a pulsed infrared laser beam at a surface of the silicon handler wafer; and
scanning the pulsed infrared laser beam across the surface of the silicon handler wafer to substantially or completely vaporize the metal layer.

3. A stack structure, comprising:
a device wafer;
a silicon handler wafer; and
a bonding structure disposed between the device wafer and the handler wafer, wherein the bonding structure bonds the device wafer and the silicon handler wafer together;
wherein the bonding structure comprises:
a metal layer formed on a surface of the silicon handler wafer, wherein the metal layer serves as a releasable layer and has a thickness in a range of 5 nanometers to less than 100 nanometers; and
a polymer adhesive layer formed on at least one of the metal layer and a surface of the device wafer;
wherein the metal layer is configured to be substantially or completely vaporized by infrared ablation when exposed to infrared laser energy through the silicon handler wafer to cause debonding and release of the device wafer from the silicon handler wafer as a direct result of the substantial or complete vaporization of the metal layer,
wherein a wavelength of the infrared energy is in a range of about 1.12 μm to about 5 μm.

4. The stack structure of claim 3 , wherein the metal layer is directly formed on a surface of the handler wafer.

5. The stack structure of claim 3 , wherein the polymer adhesive layer comprises filler particles that are configured to reflect the infrared energy.

6. The stack structure of claim 3 , further comprising a reflective layer disposed between the bonding structure and the device wafer to reflect the infrared energy away from the device wafer and protect the device wafer from being, irradiated with the infrared energy.

7. The stack structure of claim 3 , further comprising a stress compensation layer formed on a surface of the silicon handler wafer, wherein the stress compensation layer is configured to mitigate warping of the silicon handler wafer.

8. The stack structure of claim 7 , wherein the stress compensation layer is at least one of (i) disposed between the bonding, structure and the silicon handler wafer and (ii) formed on surface of the silicon hander wafer opposite a surface on which the metal layer is formed.

9. A method of testing the stack structure of claim 3 , wherein the method comprises thermally bonding a heat sink or cold plate to the silicon handler wafer and testing the device wafer using wafer level test probes to electrically test active circuitry on the device wafer.

10. The method of claim 1 , wherein the polymer adhesive layer further serves as a releasable layer, and wherein irradiating the metal layer with infrared energy further comprises vaporizing at least a portion of the polymer adhesive layer at an interface between the polymer adhesive layer and the metal layer.

11. The method of claim 1 , wherein the metal layer is formed of at least one of Al, Sn, and Zn.

12. The method of claim 1 , further comprising forming a reflective metal layer between the polymer adhesive layer and the device wafer to reflect the infrared energy away from the device wafer and protect the device water from being irradiated with the infrared energy.

13. The method of claim 1 , further comprising forming a stress compensation layer on a surface of the silicon handler wafer, wherein the stress compensation layer is configured to mitigate warping of the silicon handler wafer.

14. The method of claim 13 , wherein the stress compensation layer is formed on one of (i) the surface of the silicon wafer on which the metal layer is formed and (ii) an opposite surface of the silicon hander wafer on which the metal layer is formed.

Assignees

• IBM

Inventors

• Dang Bing
• Knickerbocker John U
• Tsang Cornelia Kang-I

Classifications

• H10P72/7422

  used to protect an active side of a device or wafer · CPC title

• H10P72/7416

  used during dicing or grinding · CPC title

• H10P72/7412

  the auxiliary support including means facilitating the separation of a device or wafer from the auxiliary support · CPC title

• H10P72/744

  Details of chemical or physical process used for separating the auxiliary support from a device or a wafer · CPC title

• H10P72/74 Primary

  using temporarily an auxiliary support · CPC title