Multistage amplifier circuit with improved settling time

Patent metadata

Field	Value
Publication number	US-9634617-B2
Application number	US-201514790592-A
Country	US
Kind code	B2
Filing date	Jul 2, 2015
Priority date	Jul 2, 2014
Publication date	Apr 25, 2017
Grant date	Apr 25, 2017

Abstract

Described examples include multistage amplifier circuits having first and second forward circuits, a comparator or sensor circuit coupled to sense a signal in the second forward circuit to identify nonlinear operation or slewing conditions in the multistage amplifier circuit, and one or more sample hold circuits operative according to a sensor circuit output signal to selectively maintain the amplitude of an amplifier input signal in the second forward circuit and/or in a feedback circuit in response to the sensor circuit output signal indicating nonlinear operation or slewing conditions in the multistage amplifier circuit. Certain examples further include a clamping circuit operative to selectively maintain a voltage at a terminal of a Miller compensation capacitance responsive to the comparator output signal indicating nonlinear operation or slewing conditions.

First claim

The following is claimed:

1. A multistage amplifier circuit, comprising:
a first forward circuit, including a first amplifier having a first amplifier input to receive an input signal, and a second amplifier having a second amplifier input coupled with an output of the first amplifier, the second amplifier including a second amplifier output providing an output signal;
a second forward circuit, including a third amplifier having a third amplifier input coupled to receive the input signal, the third amplifier having a third amplifier output coupled with the second amplifier input; and
a sensor circuit coupled with the second forward circuit to sense nonlinear operation or slewing conditions of the multistage amplifier circuit, the sensor circuit having a sensor circuit output providing a sensor circuit output signal in a first state when nonlinear operation or slewing conditions are sensed in the multistage amplifier circuit, and in a second state when nonlinear operation or slewing conditions are not sensed in the multistage amplifier circuit, wherein an amplitude of a signal within the second forward circuit is maintained at a level when the sensor circuit output is in the first state.

2. The multistage amplifier circuit of claim 1 , wherein the second forward circuit further includes a fourth amplifier having a fourth amplifier input coupled with an output of the third amplifier, and a fifth amplifier having a fifth amplifier input coupled with an output of the fourth amplifier, the fifth amplifier having a fifth amplifier output coupled with the second amplifier input, and wherein the third amplifier output is coupled to the second amplifier input via the fourth and fifth amplifiers, the multistage amplifier circuit further comprising:
a first sample hold circuit coupled with the fifth amplifier input to maintain an amplitude of a signal at the fifth amplifier input when the sensor circuit output signal is in the first state.

3. The multistage amplifier circuit of claim 2 , wherein the fourth amplifier input includes first and second differential inputs, and wherein the sensor circuit is a comparator circuit including a first comparator input coupled with the first differential input of the fourth amplifier, a second comparator input coupled with the second differential input of the fourth amplifier, and a comparator output providing the sensor circuit output signal.

4. The multistage amplifier circuit of claim 3 , wherein the input signal is a differential signal, and wherein the second forward circuit comprises:
a first chopper circuit positioned between the first amplifier input and the third amplifier input, the first chopper circuit including a first switching circuit configured to alternatively switch between two single-ended signals of the differential input signal according to a clock signal to provide a first chopped differential input signal to the third amplifier input; and
a second chopper circuit positioned between the third amplifier output and the fourth amplifier input, the second chopper circuit including a second switching circuit configured to alternatively switch between two single-ended signals of a differential output signal from the third amplifier output according to the clock signal to provide a second chopped differential input signal to the fourth amplifier input.

5. The multistage amplifier circuit of claim 3 , comprising:
a compensation capacitance including a first terminal coupled with the second amplifier output, and a second terminal coupled with the fourth amplifier input; and
a clamp circuit coupled with the fourth amplifier input to selectively maintain a voltage at the second terminal of the compensation capacitance when the sensor circuit output signal is in the first state.

6. The multistage amplifier circuit of claim 5 , wherein the clamp circuit is configured to drive a voltage between the first differential input of the fourth amplifier and the second differential input of the fourth amplifier when the sensor circuit output signal is in the first state.

7. The multistage amplifier circuit of claim 6 , comprising:
a third circuit providing a feedback loop to the second forward circuit, the third circuit including:
a sixth amplifier having a sixth amplifier input coupled with the fourth amplifier input,
a seventh amplifier having a seventh amplifier input coupled with an output of the sixth amplifier, and
a notch filter coupled between the output of the sixth amplifier and the seventh amplifier input; and

a second sample hold circuit coupled with the seventh amplifier input to maintain an amplitude of a signal at the seventh amplifier input when the sensor circuit output signal is in the first state.

8. The multistage amplifier circuit of claim 7 , wherein the input signal is a differential signal, and wherein the second forward circuit comprises:
a first chopper circuit positioned between the first amplifier input and the third amplifier input, the first chopper circuit including a first switching circuit configured to alternatively switch between two single-ended signals of the differential input signal according to a clock signal to provide a first chopped differential input signal to the third amplifier input; and
a second chopper circuit positioned between the third amplifier output and the fourth amplifier input, the second chopper circuit including a second switching circuit configured to alternatively switch between two single-ended signals of a differential output signal from the third amplifier output according to the clock signal to provide a second chopped differential input signal to the fourth amplifier input.

9. The multistage amplifier circuit of claim 7 , wherein the third circuit includes a third chopper circuit positioned between the output of the sixth amplifier and the notch filter, the third chopper circuit including a third switching circuit to alternatively switch between two single-ended signals of a differential output signal of the sixth amplifier according to the clock signal to provide a third chopped differential input signal to the notch filter.

10. The multistage amplifier circuit of claim 2 , comprising:
a compensation capacitance including a first terminal coupled with the second amplifier output, and a second terminal coupled with the fourth amplifier input; and
a clamp circuit coupled with the fourth amplifier input to selectively maintain a voltage at the second terminal of the compensation capacitance when the sensor circuit output signal is in the first state.

11. The multistage amplifier circuit of claim 10 , wherein the fourth amplifier input includes first and second differential inputs, wherein the clamp circuit is configured to drive a voltage between the first differential input of the fourth amplifier and the second differential input of the fourth amplifier when the sensor circuit output signal is in the first state.

12. The multistage amplifier circuit of claim 2 , comprising:
a third circuit providing a feedback loop to the second forward circuit, the third circuit including:
a sixth amplifier having a sixth amplifier input coupled with the fourth amplifier input,
a seventh amplifier having a seventh amplifier input coupled with an output of the sixth amplifier, and
a notch filter coupled between the output of the sixth amplifier and the seventh amplifier input; and

a second sample hold circuit coupled with the seventh amplifier input to maintain an amplitude of a signal at the seventh amplifier input when the sensor circuit output signal is in the first state.

13. The multistage amplifier circuit of claim 2 , comprising:
a third circuit provi

Assignees

• Texas Instruments Inc

Inventors

• Ivanov Vadim V
• Kumar Vaibhav
• Shaik Munaf H

Classifications

• H03F2201/3218

  the main amplifier or error amplifier being a feedforward amplifier · CPC title

• H03F2203/45544

  the IC comprising one or more capacitors, e.g. coupling capacitors · CPC title

• H03F2203/45674

  the LC comprising one current mirror · CPC title

• H03F2200/78

  A comparator being used in a controlling circuit of an amplifier · CPC title

• H03F2203/45366

  the AAC comprising multiple transistors parallel coupled at their gates only, e.g. in a cascode dif amp, only those forming the composite common source transistor · CPC title