Optimization of manufacturing methodology: p-channel trench mos with low vth and n-type poly
US-2015001615-A1 · Jan 1, 2015 · US
US9633997B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9633997-B2 |
| Application number | US-201415114201-A |
| Country | US |
| Kind code | B2 |
| Filing date | Sep 8, 2014 |
| Priority date | Feb 10, 2014 |
| Publication date | Apr 25, 2017 |
| Grant date | Apr 25, 2017 |
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A semiconductor device, in which, in a density distribution of first conductivity type impurities in the first conductivity type region measured along a thickness direction of the semiconductor substrate, a local maximum value N 1 , a local minimum value N 2 , a local maximum value N 3 , and a density N 4 are formed in this order from front surface side, a relationship of N 1 >N 3 >N 2 >N 4 is satisfied, a relationship of N 3 /10>N 2 is satisfied, and a distance “a” from the surface to the depth having the local maximum value N 1 is larger than twice a distance “b” from the depth having the local maximum value N 1 to the depth having the local minimum N 2.
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The invention claimed is: 1. A semiconductor device, comprising a first conductivity type region exposed on a surface of a semiconductor substrate, wherein a local maximum value N 1 , a local minimum value N 2 , and a local maximum value N 3 exist in a density distribution of first conductivity type impurities in the first conductivity type region measured along a thickness direction of the semiconductor substrate, a depth having the local maximum value N 1 is located on the surface side with respect to a depth having the local minimum value N 2 , a depth having the local maximum value N 3 is located on an opposite side of the surface with respect to the depth having the local minimum value N 2 , a region having a density N 4 of the first conductivity type impurities is located in a part of the first conductivity type region located on an opposite side of the surface with respect to the depth having the local maximum value N 3 , a relationship of N 1 >N 3 >N 2 >N 4 is satisfied, a relationship of N 3 /10>N 2 is satisfied, and a distance “a” from the surface to the depth having the local maximum value N 1 is larger than twice a distance “b” from the depth having the local maximum value N 1 to the depth having the local minimum value N 2 . 2. The semiconductor device of claim 1 , wherein a depth having a density N 5 of the first conductivity type impurities is located on the surface side with respect to the depth having the local maximum value N 1 , the density N 5 is one tenth of the local maximum value N 1 , and a distance “c” from the depth having the density N 5 to the depth having the local maximum value N 1 is larger than twice the distance “b”. 3. The semiconductor device of claim 1 , wherein a diode is provided in the semiconductor substrate, and the first conductivity type region is a cathode region of the diode. 4. The semiconductor device of claim 3 , wherein an IGBT is further provided in the semiconductor substrate. 5. The semiconductor device of claim 1 , wherein a MOSFET is provided in the semiconductor substrate, and the first conductivity type region is a source region or a drain region of the MOSFET. 6. A method for manufacturing a semiconductor device, comprising: a first implantation for implanting first conductivity type impurities into a surface of a semiconductor substrate of a first conductivity type, heat treating the semiconductor substrate after the first implantation at a temperature at which the semiconductor substrate does not melt, a second implantation for implanting first conductivity type impurities into the surface of the semiconductor substrate at an energy lower than in the first implantation and at a density higher than in the first implantation, and melting, after the second implantation, a region located on the surface side with respect to an average position of positions at which the first conductivity type impurities stop in the first implantation and then solidifying the region.
with electromagnetic radiation, e.g. laser annealing (laser cutting H10P54/20) · CPC title
characterised by the semiconductor materials · CPC title
Thermal treatments, e.g. annealing or sintering · CPC title
into Group IV semiconductors · CPC title
of electrically active species · CPC title
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