Spread-spectrum clock generation circuit, integrated circuit and apparatus therefor

Patent metadata

Field	Value
Publication number	US-9628057-B2
Application number	US-201314909212-A
Country	US
Kind code	B2
Filing date	Aug 1, 2013
Priority date	Aug 1, 2013
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A spread-spectrum clock generation circuit comprises at least one comparison element; at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

First claim

The invention claimed is:

1. A spread-spectrum clock generation circuit comprising:
at least one comparison element;
a shunt charge storage device operably coupled to the at least one comparison element and arranged to limit a voltage applied thereto;
at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and
a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

2. The spread-spectrum clock generation circuit of claim 1 wherein the charge storage device is at least one feedback capacitor.

3. The spread-spectrum clock generation circuit of claim 1 wherein the switched charge storage arrangement comprises a plurality of individually switchable charge storage devices.

4. The spread-spectrum clock generation circuit of claim 3 wherein a number of the plurality of individually switchable charge storage devices are dynamically selected thereby altering a switching frequency of the spread-spectrum clock generation circuit.

5. The spread-spectrum clock generation circuit of claim 3 wherein the plurality of individually switchable charge storage devices are operably coupled to a switching arrangement for selectively applying a number of the individually switchable charge storage devices to be located in parallel to the feedback capacitor.

6. The spread-spectrum clock generation circuit of claim 3 wherein a number of the plurality of individually switchable charge storage devices sets at least one from a group comprising:
a frequency modulation of the oscillation frequency of the spread-spectrum clock generation circuit;
a frequency spreading of the oscillation frequency of the spread-spectrum clock generation circuit;
a dithering of the oscillation frequency of the spread-spectrum clock generation circuit.

7. The spread-spectrum clock generation circuit of claim 3 , wherein the individually switchable charge storage devices are selected in an asynchronous manner.

8. The spread-spectrum clock generation circuit of claim 2 wherein the at least one feedback capacitor sets a maximum oscillation frequency of the spread-spectrum clock generation circuit when no individually switchable charge storage device is applied in parallel.

9. The spread-spectrum clock generation circuit of claim 1 wherein selection of an individually switchable charge storage device of the switched charge storage arrangement together with the at least one charge storage device sets a range of oscillation frequencies of the spread-spectrum clock generation circuit.

10. The spread-spectrum clock generation circuit of claim 3 wherein a minimum oscillation frequency of the spread-spectrum clock generation circuit is set when each of the individually switchable charge storage devices is applied.

11. The spread-spectrum clock generation circuit of claim 3 wherein the plurality of individually switchable charge storage devices form a weighted capacitor array.

12. The spread-spectrum clock generation circuit of claim 2 , wherein the switched charge storage arrangement comprises a capacitive ladder network arranged to represent the individually switchable charge storage devices.

13. The spread-spectrum clock generation circuit of claim 12 , wherein the capacitive ladder network comprises a plurality of individually switchable capacitor arrays.

14. The spread-spectrum clock generation circuit of claim 3 , wherein a number of the plurality of individually switchable charge storage devices that are applied in parallel sets a clock-frequency spreading bandwidth of the spread-spectrum clock generation circuit.

15. The spread-spectrum clock generation circuit of claim 1 , wherein the comparison element is a single threshold comparator.

16. An integrated circuit comprising the spread-spectrum clock generation circuit according to claim 1 .

17. A spread-spectrum clock generation circuit comprising:
at least one comparison element;
at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and
a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit, wherein the switched charge storage arrangement comprises a plurality of individually switchable charge storage devices, and wherein the number of individually switchable charge storage devices is controlled by at least one from a group comprising: a programmable pseudo-random-number generator, a linear feedback shift register.

18. An apparatus comprising an oscillator circuit having:
at least one comparison element;
a shunt charge storage device operably coupled to the at least one comparison element and arranged to limit a voltage applied thereto;
at least one charge storage device arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a first oscillation frequency of the spread-spectrum clock generation circuit; and
a switched charge storage arrangement additionally arranged to couple an output of the at least one comparison element to an input of the at least one comparison element and arranged to set a second oscillation frequency of the spread-spectrum clock generation circuit.

19. The apparatus of claim 18 wherein the apparatus is a switched-mode power supply or a synchronous digital system.

Assignees

• Shuvalov Denis Sergeevich
• Nxp Usa Inc

Inventors

• Shuvalov Denis Sergeevich

Classifications

• H03K25/02

  comprising charge storage, e.g. capacitor without polarisation hysteresis · CPC title

• H03J2200/10

  Tuning of a resonator by means of digitally controlled capacitor bank · CPC title

• H03K5/00006 Primary

  Changing the frequency (modulating pulses H03K7/00; frequency dividers H03K21/00 - H03K29/00; additive or subtractive mixing of two pulse rates into one G06F7/605; pulse rate dividers G06F7/68) · CPC title

• H03K3/0231

  Astable circuits {(H03K3/0315 takes precedence)} · CPC title