Common-mode feedback circuit, corresponding signal processing circuit and method

US9628028B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9628028-B2
Application numberUS-201514746124-A
CountryUS
Kind codeB2
Filing dateJun 22, 2015
Priority dateSep 9, 2014
Publication dateApr 18, 2017
Grant dateApr 18, 2017

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A common-mode feedback circuit includes a transconductor input stage with differential input terminals, and a frequency-compensated gain stage coupled to the transconductor input stage with differential output terminals. The common-mode feedback circuit also includes a feedback loop having a comparator configured to produce a feedback error signal for the transconductor input stage by comparing with a reference a common-mode sensing signal indicative of a common-mode voltage level sensed at the differential output terminals. In addition, the common-mode feedback loop includes a converter for converting the common-mode voltage level sensed at said differential output terminals into a current signal coupled to the comparator.

First claim

Opening claim text (preview).

The invention claimed is: 1. A common-mode feedback circuit comprising: a transconductor input stage having differential input terminals; a frequency-compensated gain stage coupled to said transconductor input stage and having differential output terminals; a common-mode feedback loop including a comparator configured to produce a feedback error signal for said transconductor input stage by comparing a common-mode sensing signal indicative of a common-mode voltage level sensed at said differential output terminals with a reference; said common-mode feedback loop including a converter configured to convert the common-mode voltage level sensed at said differential output terminals into a current signal coupled to said comparator, said converter comprising a pair of common-mode detector resistors coupled to said differential output terminals, and said comparator comprising a current amplifier. 2. The common-mode feedback circuit of claim 1 , further comprising a cascode current mirror with a first portion coupled with said comparator and a second portion coupled with said transconductor input stage. 3. The common-mode feedback circuit of claim 1 , further comprising a multi-output current mirror having respective gains towards said transconductor input stage and said comparator. 4. The common-mode feedback circuit of claim 1 , wherein said transconductor input stage comprises output nodes coupled to said frequency-compensated gain stage and the feedback error signal of said common-mode feedback loop is injected into one of said output nodes of said transconductor input stage, and a tail current generator of said transconductor input stage. 5. The common-mode feedback circuit of claim 1 , wherein said comparator comprises a transistor pair sensitive to said reference and said current signal from said converter. 6. The common-mode feedback circuit of claim 5 , wherein said common-mode feedback loop comprises at least one further transistor coupled with a transistor of said transistor pair to generate said feedback error signal for said transconductor input stage. 7. The common-mode feedback circuit of claim 6 , further comprising at least one of: a start-up current generator coupled with a current generator circuit at said comparator; a beta helper coupled to a differential transistor pair in said comparator; and at least one of a first error-compensating resistor and a second self-bias resistor coupled with an input terminal of said comparator for said reference. 8. An integrated circuit comprising: a transconductor input stage; a frequency-compensated gain stage coupled to said transconductor input stage and having differential output terminals; and a common-mode feedback loop including a comparator configured to produce a feedback error signal for said transconductor input stage by comparing a common-mode sensing signal indicative of a common-mode voltage level sensed at said differential output terminals with a reference; said common-mode feedback loop including a converter configured to convert a common-mode voltage sensing signal into a current signal coupled to said comparator, said converter comprising a pair of common-mode detector resistors coupled to said differential output terminals, and said comparator comprising a current amplifier. 9. The integrated circuit of claim 8 , further comprising a cascode current mirror with a first portion coupled with said comparator and a second portion coupled with said transconductor input stage. 10. The integrated circuit of claim 8 , further comprising a multi-output current mirror having respective gains towards said transconductor input stage and said comparator. 11. A method of providing feedback in a common-mode feedback circuit comprising a transconductor input stage having differential input terminals, a frequency-compensated gain stage coupled to said transconductor input stage and having differential output terminals, a converter comprising a pair of common-mode detector resistors coupled to said differential output terminals, and a comparator comprising a current amplifier, the method comprising: producing a common-mode feedback error signal by a comparison of a common-mode sensing signal indicative of a common-mode voltage at said differential output terminals with a reference; and converting said common-mode sensing signal into a current signal for said comparison. 12. The method of claim 11 , further comprising a cascode current mirror with a first portion coupled with said comparator and a second portion coupled with said transconductor input stage. 13. The method of claim 11 , further comprising a multi-output current mirror having respective gains towards said transconductor input stage and said comparator. 14. An integrated circuit comprising: a transconductor input stage having differential input terminals; a frequency-compensated gain stage coupled to said transconductor input stage and having differential output terminals; a common-mode feedback loop including a comparator configured to produce a feedback error signal for said transconductor input stage; and a multi-output current mirror comprising a first portion coupled with said comparator and a second portion coupled with said transconductor input stage; said common-mode feedback loop including a converter configured to convert a common-mode voltage level sensed at said differential output terminals into a current signal coupled to said comparator. 15. The integrated circuit of claim 14 , wherein the multi-output current mirror has respective gains towards said transconductor input stage and said comparator. 16. The integrated circuit of claim 14 , wherein said transconductor input stage comprises output nodes coupled to said frequency-compensated gain stage and the feedback error signal of said common-mode feedback loop is injected into one of said output nodes of said transconductor input stage, and a tail current generator of said transconductor input stage.

Assignees

Inventors

Classifications

  • using MOSFET transistors as the active amplifying circuit (H03F3/45278 takes precedence) · CPC title

  • the addition of two signals being made by a resistor addition circuit for producing the common mode signal · CPC title

  • H03F1/083Primary

    in transistor amplifiers (H03F1/10 - H03F1/22 take precedence) · CPC title

  • Feedback coupled to the input of the differential amplifier · CPC title

  • A scaled replica of a transistor being present in an amplifier · CPC title

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What does patent US9628028B2 cover?
A common-mode feedback circuit includes a transconductor input stage with differential input terminals, and a frequency-compensated gain stage coupled to the transconductor input stage with differential output terminals. The common-mode feedback circuit also includes a feedback loop having a comparator configured to produce a feedback error signal for the transconductor input stage by comparing…
Who is the assignee on this patent?
St Microelectronics Srl
What technology area does this patent fall under?
Primary CPC classification H03F1/083. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Apr 18 2017 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).