Ceramic multi-layered capacitor

Patent metadata

Field	Value
Publication number	US-9627141-B2
Application number	US-201314399860-A
Country	US
Kind code	B2
Filing date	Apr 11, 2013
Priority date	May 8, 2012
Publication date	Apr 18, 2017
Grant date	Apr 18, 2017

Abstract

A ceramic multi-layer capacitor includes a main body, which has ceramic layers arranged along a layer stacking direction to form a stack, and first and second electrode layers arranged between the ceramic layers. The multi-layer capacitor also includes a first external contact-connection arranged on a first side surface of the main body and electrically conductively connected to the first electrode layers, and a second external contact-connection arranged on a second side surface ( 62 ) of the main body ( 2 ). The second side surface is situated opposite the first side surface and is electrically conductively connected to the second electrode layers.

First claim

The invention claimed is:

1. A ceramic multi-layer capacitor comprising:
a main body including ceramic layers arranged along a layer stacking direction to form a stack, the main body further including first and second electrode layers arranged between the ceramic layers;
a first external contact-connection arranged on a first side surface of the main body and electrically conductively connected to the first electrode layers; and
a second external contact-connection arranged on a second side surface of the main body, the second side surface located opposite the first side surface and being electrically conductively connected to the second electrode layers,
wherein the main body has a width B along the layer stacking direction,
wherein the main body has a height H perpendicular to the first side surface,
wherein the main body has a length L perpendicular to the height H and perpendicular to the layer stacking direction,
wherein B/H≧0.2 holds true,
wherein the ceramic layers comprise a ceramic material for which the following formula holds true:
Pb (1−1.5a−0.5b+1.5d+e+0.5f) A a B b (Zr 1-x Ti x ) 1−c−d−e−f Li d C e Fe f Si c O 3 +y ·PbO  (I), and

wherein
A is selected from the group consisting of La, Nd, Y, Eu, Gd, Tb, Dy, Ho, Er and Yb,
B is selected from the group consisting of Na, K and Ag,
C is selected from the group consisting of Ni, Cu, Co and Mn, and
0<a<0.12,
0.05≦×≦0.3,
0≦b<0.12,
0≦c<0.12,
0≦d<0.12,
0≦e<0.12,
0≦f<0.12,
0≦y<1, and
b+d+e+f>0.

2. The multi-layer capacitor according to claim 1 , wherein L/B≧1 holds true.

3. The multi-layer capacitor according to claim 1 , wherein L/H≧1 holds true.

4. The multi-layer capacitor according to claim 1 , wherein the main body has third electrode layers that are electrically conductively connected to neither the first external contact-connection nor the second external contact-connection.

5. The multi-layer capacitor according to claim 4 , wherein the third electrode layers overlap the first and second electrode layers.

6. The multi-layer capacitor according to claim 1 , wherein each ceramic layer has a layer thickness of between 3 μm and 200 μm.

7. The multi-layer capacitor according to claim 1 , wherein each first electrode layer has a layer thickness of between 0.1 μm and 10 μm, and wherein each second electrode layer has a layer thickness of between 0.1 μm and 10 μm.

8. The multi-layer capacitor according to claim 1 , wherein the main body has at least 10 first electrode layers and at least 10 second electrode layers.

9. The multi-layer capacitor according to claim 1 , wherein the following relationship holds true: number of first electrode layers/width B≧10/mm.

10. The multi-layer capacitor according to claim 1 , wherein the first and second electrode layers comprise copper.

11. The multi-layer capacitor according to claim 1 , wherein the first and second side surfaces are surface-treated.

12. The multi-layer capacitor according to claim 11 , wherein the first and second side surfaces are lapped, ground or plasma-etched.

13. The multi-layer capacitor according to claim 1 , wherein the first and second external contact-connections each have at least one sputtering layer in direct contact with the first or second electrode layers.

Assignees

• Epcos Ag

Inventors

• Engel Günter
• Schossmann Michael
• Koini Markus
• Testino Andrea
• Hoffmann Christian

Classifications

• H01G4/12

  Ceramic dielectrics {(H01G4/085 takes precedence)} · CPC title

• C04B2235/3225

  Yttrium oxide or oxide-forming salts thereof · CPC title

• C04B2235/3274

  Ferrites · CPC title

• C04B2235/3203

  Lithium oxide or oxide-forming salts thereof · CPC title

• C04B2235/768

  Perovskite structure ABO3 · CPC title