Object carrier transport system and method of transporting object carriers

Patent metadata

Field	Value
Publication number	US-9618921-B2
Application number	US-201414249469-A
Country	US
Kind code	B2
Filing date	Apr 10, 2014
Priority date	Jan 10, 2014
Publication date	Apr 11, 2017
Grant date	Apr 11, 2017

Abstract

A semiconductor electronic device structure includes an active area array disposed in a substrate, an isolation structure, a plurality of recessed gate structures, a plurality of word lines, and a plurality of bit lines. The active area array a plurality of active area columns and a plurality of active area rows, defining an array of active areas. The substrate has two recesses formed at the central region thereof. Each recessed gate structure is respectively disposed in the recess. A protruding structure is formed on the substrate in each recess. A STI structure of the isolation structure is arranged between each pair of adjacent active area rows. Word lines are disposed in the substrate, each electrically connecting the gate structures there-under. Bit lines are disposed above the active areas, forming a crossing pattern with the word lines.

First claim

What is claimed is:

1. An object carrier transport system for a carrier storage apparatus for carrying carriers in a plurality of storage sections, the carriers each having a relative priority denoted by a first positive integer, the storage sections each having a relative priority denoted by a second positive integer, the carrier arrangement system comprising:
a handling unit, wherein the carriers being moved by the handling unit;
a control unit coupled to the handling unit, wh…

Assignees

• Inotera Memories Inc

Inventors

• Chen Tsan I
• Chen Yu-Kun

Classifications

• H10P95/00

  Electricity · mapped topic

• G05B19/0405 Primary

  Physics · mapped topic

• G05B19/41865 Primary

  Physics · mapped topic

• Y02P90/20

  Cross-Sectional Technologies · mapped topic

• G05B2219/32266

  Physics · mapped topic