Power semiconductor chip with a metallic moulded body for contacting thick wires or strips and method for the production thereof

Patent metadata

Field	Value
Publication number	US-9613929-B2
Application number	US-201615095802-A
Country	US
Kind code	B2
Filing date	Apr 11, 2016
Priority date	Oct 15, 2011
Publication date	Apr 4, 2017
Grant date	Apr 4, 2017

Abstract

The invention relates to a power semiconductor chip ( 10 ) having at least one upper-sided potential surface and contacting thick wires ( 50 ) or strips, comprising a connecting layer (I) on the potential surfaces, and at least one metal molded body ( 24, 25 ) on the connecting layer(s), the lower flat side thereof facing the potential surface being provided with a coating to be applied to the connecting layer (I) according to a connection method, and the material composition thereof and the thickness of the related thick wires ( 50 ) or strips arranged on the upper side of the molded body used according to the method for contacting are selected corresponding to the magnitude.

First claim

What is claimed is:

1. A method for fitting moulded bodies on power semiconductor chips of an unsawed wafer assembly, comprising step of:
providing an electrically isolating carrying foil comprising a plurality of moulded metal bodies;
providing the unsawed wafer assembly comprising a plurality of power semiconductor chips on a substrate, each of the plurality of power semiconductor chips including one or more potential faces; and
applying the electrically isolating carrying foil with the plurality of moulded metal bodies onto the potential faces on an upper side of the unsawed wafer assembly;
wherein the electrically isolating carrying foil resists a thermal load of bonding the electrically isolating carrying foil and the plurality of moulded metal bodies to the potential faces on the upper side of the unsawed wafer assembly.

2. The method of claim 1 further comprising the step of providing an upper bonding layer between the upper side of the unsawed wafer assembly and lower flat sides of the plurality of moulded metal bodies.

3. The method of claim 2 , wherein a surface area of the upper bonding layer in a plan view is smaller than a total area of the lower flat sides of the plurality of moulded metal bodies such that a rim of each of the plurality of moulded metal bodies is fixed on the electrically isolating carrying foil.

4. The method of claim 1 further comprising a step of connecting thick wires or strips to upper sides of the plurality of moulded metal bodies.

5. The method of claim 1 , wherein each of the plurality of moulded metal bodies comprises at least one of Cu, Ag, Au, Al, Mo, W or alloys comprising one or more of Cu, Ag, Au, Al, Mo or W, and wherein a lower flat side of each of the plurality of moulded metal bodies is covered by at least one of Ag or Au.

6. The method of claim 1 , wherein the electrically isolating carrying foil covers areas of a metalissation surface on the upper side of the unsawed wafer assembly that are not to be bonded to lower flat sides of the plurality of moulded metal bodies.

7. The method of claim 1 , wherein wherein the upper side of an unsawed wafer assembly has a plurality of potential faces; wherein a number of potential faces corresponds to a number of moulded metal bodies.

Assignees

• Danfoss Silicon Power Gmbh

Inventors

• Becker Martin
• Eisele Ronald
• Osterwald Frank
• Rudzki Jacek

Classifications

• H10W72/5524

  comprising aluminium [Al] · CPC title

• H10W72/534

  being rectangular · CPC title

• H10W72/552

  comprising metals or metalloids, e.g. silver · CPC title

• H10W74/00

  Encapsulations, e.g. protective coatings · CPC title

• H10W72/884

  Die-attach connectors and bond wires · CPC title