Flexible TFT backpanel by glass substrate removal
US-9240437-B2 · Jan 19, 2016 · US
US9608017B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9608017-B2 |
| Application number | US-201514635865-A |
| Country | US |
| Kind code | B2 |
| Filing date | Mar 2, 2015 |
| Priority date | Mar 2, 2015 |
| Publication date | Mar 28, 2017 |
| Grant date | Mar 28, 2017 |
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The process of fabricating a flexible TFT back-panel includes depositing etch stop material on a glass support. A matrix of contact pads, gate electrodes and gate dielectric are deposited overlying the etch stop material. Vias are formed through the dielectric in communication with each pad. A matrix of TFTs is formed by depositing and patterning metal oxide semiconductor material to form an active layer of each TFT overlying the gate electrode. Source/drain metal is deposited on the active layer and in the vias in contact with the pads, the source/drain metal defining source/drain terminals of each TFT. Passivation material is deposited in overlying relationship to the TFTs. A color filter layer is formed on the passivation material and a flexible plastic carrier is affixed to the color filter. The glass support member and the etch stop material are then etched away to expose a surface of each of the pads.
Opening claim text (preview).
Having fully described the invention in such clear and concise terms as to enable those skilled in the art to understand and practice the same, the invention claimed is: 1. A process of fabricating a flexible TFT back-panel on a glass support comprising the steps of: providing a flat glass support member having an upper surface; depositing a layer of etch stop material on the upper surface of the glass support member; depositing a display/photoimager/chem/bio-sensor pixel element contact pad overlying the layer of etch stop material; depositing gate metal overlying the etch stop material and patterning the gate metal to define a gate electrode of a TFT and connecting lines; depositing a layer of gate dielectric material overlying the contact pad and the gate metal, and forming a via through the layer of gate dielectric material in communication with the contact pad; depositing and patterning semiconductor material to form an active layer of the TFT overlying the gate electrode; depositing source/drain contact metal on the active layer and in the via in electrical contact with the contact pad and patterning the source/drain contact metal to define source and drain terminals of the TFT; depositing a layer of passivation material in overlying relationship to the TFT; forming a color filter on the layer of passivation material; affixing a flexible plastic carrier to the color filter; and etching the glass support member away and etching the layer of etch stop material away to expose a surface of the display/photoimager/chem/bio-sensor pixel element contact pad. 2. A process as claimed in claim 1 wherein the active layer is one of a metal-oxide semiconductor, an amorphous or polycrystalline silicon film, and an organic semiconductor. 3. A process as claimed in claim 1 wherein the display/photoimager/chem/bio-sensor pixel element contact pad is designed to connect to one of an LCD, an OLED, a chemical sensor and a biosensor. 4. A process as claimed in claim 1 further including a step of depositing a buffer layer on the layer of etch stop material prior to the step of depositing the display/photoimager/chem/bio-sensor pixel element contact pad. 5. A process as claimed in claim 4 wherein the buffer layer is selected to protect the display/photoimager/chem/bio-sensor pixel element contact pad during the step of etching the layer of etch stop material away to expose a surface of the display/photoimager/chem/bio-sensor pixel element contact pad. 6. A process as claimed in claim 1 further including the step of depositing a planarization layer over the display/photoimager/chem/bio-sensor pixel element contact pad and the step of depositing the gate metal includes depositing the gate metal on the planarization layer. 7. A process as claimed in claim 6 further including a step of forming a via through the planarization layer in alignment with the via through the layer of gate dielectric material. 8. A process as claimed in claim 1 further including a step of reversing the structure to position the display/photoimager/chem/bio-sensor pixel element contact pad at an upper surface and forming a display/photoimager/chem/bio-sensor pixel element on the upper surface in electrical contact with the contact pad. 9. A process as claimed in claim 1 wherein the step of depositing the layer of etch stop material includes depositing one of Au, Pt, and Pd. 10. A process as claimed in claim 9 wherein the layer of etch stop material is less than 200 nm thick. 11. A process of fabricating a flexible TFT back-panel on a glass support comprising the steps of: providing a flat glass support member having an upper surface; depositing a layer of etch stop material on the upper surface of the glass support member; depositing a buffer layer on the layer of etch stop material; depositing a matrix of display/photoimager/chem/bio-sensor pixel element contact pads overlying the layer of etch stop material; depositing a planarization layer on the matrix of display/photoimager/chem/bio-sensor pixel element contact pads and surrounding buffer layer; depositing gate metal on the planarization layer and patterning the gate metal to define a matrix of TFT gate electrodes and connecting lines for a matrix of TFTs; depositing a layer of gate dielectric material on the matrix of TFT gate electrodes and connecting lines, and forming a via through the layer of gate dielectric material and planarization layer in communication with the contact pad for each TFT in the matrix of TFT gate electrodes; depositing and patterning semiconductor material to form an active layer overlying the gate electrode for each TFT in the matrix of TFTs; depositing source/drain contact metal on the active layer and in the via in electrical contact with the contact pad for each TFT in the matrix of TFTs, and patterning the source/drain contact metal to define source and drain terminals for each TFT in the matrix of TFTs; depositing a layer of passivation material in overlying relationship to the matrix of TFTs; forming a color filter on the layer of passivation material; affixing a flexible plastic carrier to the color filter; etching the glass support member away; etching the layer of etch stop material away; etching the buffer layer away to expose a surface of each display/photoimager/chem/bio-sensor pixel element contact pad of the matrix of display/photoimager/chem/bio-sensor pixel element contact pads, whereby a flexible TFT back-panel is provided. 12. A process as claimed in claim 11 wherein the active layer is a metal-oxide semiconductor film, an amorphous or polycrystalline silicon film, an organic semiconductor film. 13. A process as claimed in claim 11 wherein the matrix of display/photoimager/chem/bio-sensor pixel element contact pads is designed to connect one each to one of an LCD, an OLED, a chemical sensor and a biosensor. 14. A process as claimed in claim 11 wherein the buffer layer is selected to protect the display/photoimager/chem/bio-sensor pixel element contact pads during the step of etching the layer of etch stop material away to expose a surface of the display/photoimager/chem/bio-sensor pixel element contact pads. 15. A process as claimed in claim 11 further including a step of reversing the structure to position the display/photoimager/chem/bio-sensor pixel element contact pads at an upper surface and forming a matrix of display/photoimager/chem/bio-sensor pixel elements on the upper surface in electrical contact, one each in contact with one each of the matrix of contact pads. 16. A process as claimed in claim 11 wherein the step of depositing the layer of etch stop material includes depositing one of Au, Pt, and Pd. 17. A process as claimed in claim 16 wherein the layer of etch stop material is less than 200 nm thick. 18. A process of fabricating a flexible TFT back-panel on a glass support comprising the steps of: providing a flat glass support member having an upper surface; depositing a layer of etch stop material on the upper surface of the glass support member; depositing a buffer layer on the layer of etch stop material; depositing a matrix of OLED contact pads overlying the layer of etch stop material; depositing a planarization layer on the matrix of OLED contact pads and surrounding buffer layer; depositing gate metal on the planarization layer and patterning the gate metal to define a matrix of TFT gate electrodes and connecting lines for a matrix of TFTs; depositing a layer of gate dielectric material on the matrix of TFT gate electrodes and con
Manufacture or treatment specially adapted for the organic devices covered by this subclass · CPC title
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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