Semiconductor package using a coreless signal distribution structure
US-11869879-B2 · Jan 9, 2024 · US
US9603257B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9603257-B2 |
| Application number | US-201113879778-A |
| Country | US |
| Kind code | B2 |
| Filing date | Oct 14, 2011 |
| Priority date | Oct 22, 2010 |
| Publication date | Mar 21, 2017 |
| Grant date | Mar 21, 2017 |
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A pattern substrate includes a substrate having a surface on which a first area and a second area are formed, and a pattern layer formed at the first area among the first area and the second area. The pattern layer is a wiring pattern layer or a transparent electrode, the first area has a convex/concave shape where a capillary phenomenon occurs, and the convex/concave shape includes an aggregate of a plurality of structures.
Opening claim text (preview).
The invention claimed is: 1. A pattern substrate, comprising: a substrate that has a first surface and an opposite second surface on which a first area and a second area are provided, wherein the first surface of the substrate contains a liquid repellant film; a pattern layer at the first area among the first area and the second area on the first surface, wherein the pattern layer is a wiring pattern layer or a transparent electrode, and the first area has a convex/concave shape, and the convex/concave shape is configured by an aggregate of a plurality of structures; and another pattern layer formed at the first area among the first area and the second area on the second surface of the substrate, wherein a through hole is provided in the first area of the substrate, and a composition of the pattern layer is present in the through hole to connect the first area of the first surface and the first area of the second surface. 2. The pattern substrate according to claim 1 , wherein a contact angle is 120 degrees or more if the composition of the pattern layer is dropped onto the first area. 3. The pattern substrate according to claim 1 , wherein an arrangement pitch of the plurality of structures is 150 nm or more to 1 μm or less, and wherein an aspect ratio of the plurality of structures is 1.0 or more to 3.0 or less. 4. The pattern substrate according to claim 1 , wherein if the composition of the pattern layer coats the first surface of the substrate, the composition of the pattern layer is continuously left on the first area. 5. The pattern substrate according to claim 1 , wherein the second area has liquid repellency to the composition the pattern layer. 6. The pattern substrate according to claim 1 , wherein the pattern layer includes a conductive material. 7. The pattern substrate according to claim 6 , wherein the conductive material is a transparent oxide semiconductor, a metal or a conductive polymer. 8. The pattern substrate according to claim 1 , wherein the pattern layer has a shape similar to the convex/concave shape. 9. An information input apparatus, comprising the pattern substrate according to claim 1 . 10. A display apparatus, comprising the pattern substrate according to claim 1 . 11. The pattern substrate according to claim 1 , wherein the composition of the pattern layer is coated on the first surface of the substrate to provide the pattern layer, and the composition of the pattern layer is continuously left at the first area among the first area and the second area. 12. The pattern substrate according to claim 1 , wherein the liquid repellant film contains a compound that has a fluoro alkyl group. 13. The pattern substrate according to claim 1 , wherein the second area has a higher liquid repellency to the composition of the pattern layer than the first area. 14. The pattern substrate according to claim 1 , wherein the substrate comprises a substrate layer laminated with a shaping layer that has the convex/concave shape, wherein the liquid repellant film is on a surface of the shaping layer.
for securing the interconnections to the substrate, e.g. to prevent peeling · CPC title
Applying pastes or inks, e.g. screen printing (H10W70/095 takes precedence) · CPC title
After-treatment of the printed patterns, e.g. sintering or curing methods · CPC title
Electricity · mapped topic
by using a substrate provided with a shape pattern, e.g. grooves, banks, resist pattern · CPC title
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