Package substrate and semiconductor package including the same
US-2024429153-A1 · Dec 26, 2024 · US
US9601448B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9601448-B2 |
| Application number | US-201615094759-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 8, 2016 |
| Priority date | Oct 9, 2013 |
| Publication date | Mar 21, 2017 |
| Grant date | Mar 21, 2017 |
A practical reading order for non-experts. Skip the full description unless you need deep technical detail.
What the patent document calls the invention.
A short plain-language summary of the technical disclosure.
Who owns or filed the patent and who is credited as inventor.
Filing, priority, publication, and grant dates set the timeline.
The legal scope of protection — read this for what is actually claimed.
Technology tags used to group this patent with similar filings.
Prior art links and similar publications in this corpus.
Official abstract text for this publication.
An electrode connection structure includes: a first electrode of an electrical circuit; and a second electrode of the electrical circuit that is electrically connected to the first electrode. The first and second electrodes are oppositely disposed in direct or indirect contact with each other. A plated lamination is substantially uniformly formed by plating process from a surface of a contact region and opposed surfaces of the first and second electrodes. A void near the surface of the contact region is filled by formation of the plated lamination. Portions of the plated lamination formed from the opposed surfaces of the first and second electrodes in a region other than the contact region are not joined together.
Opening claim text (preview).
What is claimed is: 1. An electrode connection structure comprising: a first electrode of an electrical circuit; and a second electrode of the electrical circuit that is electrically connected to the first electrode, wherein the first and second electrodes are oppositely disposed in direct or indirect contact with each other at an at least one contact region, a plated lamination is formed on a surface near the contact region and opposed surfaces of the first and second electrodes, and portions of the plated lamination formed on the opposed surfaces of the first and second electrodes in a region other than the contact region are separated, and a portion near the contact region consists only of the plated lamination. 2. The electrode connection structure according to claim 1 , wherein contact portions where the first and second electrodes are in direct or indirect contact with each other, are held in a point-like or linear manner. 3. The electrode connection structure according to claim 1 , wherein a plating material comprises a metal having a melting point of 700° C. or higher, or an alloy of the metal. 4. The electrode connection structure according to claim 1 , wherein a plating material comprises nickel or a nickel alloy, or copper or a copper alloy, and a material of each surface of the first and second electrodes to be connected comprises nickel or a nickel alloy, copper or a copper alloy, gold or a gold alloy, or silver or a silver alloy. 5. The electrode connection structure according to claim 1 , wherein the first and second electrodes are electrically connected through a spherical or hemispherical conductive terminal, or a lead wire. 6. The electrode connection structure according to claim 1 , wherein the first and second electrodes to be electrically connected, comprise one of a chip electrode and a substrate electrode and the other, respectively, and the chip comprises an SiC semiconductor, a GaN semiconductor, a power Si semiconductor, a solar cell Si semiconductor, or an LED element. 7. The electrode connection structure according to claim 1 , wherein when a chip backside electrode as the first electrode and a substrate electrode as the second electrode are connected with a die bonding structure, a through-hole for circulating a plating solution is formed in the substrate electrode. 8. The electrode connection structure according to claim 1 , wherein the first and second electrodes are directly or indirectly connected with the respective electrodes in a conduction state by solder or low temperature sintered metal, and a junction is formed by coating the connected portion with plating. 9. The electrode connection structure according to claim 1 , further comprising first and second convex electrodes in direct contact with the first and second electrodes across an interposer in between the first and second electrodes, wherein a plating layer is formed across the interposer in a state where an imaginary line passing through respective centers of the first and second convex electrodes across the interposer is not perpendicular to an electrode plane of the first and/or second electrodes. 10. The electrode connection structure according to claim 1 , wherein at least one of the first and second electrodes comprises a chip electrode, and at least a side portion of a chip having the chip electrode is coated with an insulating material. 11. The electrode connection structure according to claim 1 , wherein the first electrode comprises a first contact region and the second electrode comprises a second contact region, the first contact region and the second contact region indirectly contact with each other. 12. The electrode connection structure according to claim 1 , wherein the plated lamination is substantially uniformly formed on the surface near the contact region and opposed surfaces of the first and second electrodes. 13. The electrode connection structure according to claim 1 , wherein the first and second electrodes comprise an electrode between chips or an electrode between a chip and a substrate, and the tip and/or the substrate are plate-processed with the same sandwiched vertically, in a state where the first and second electrodes are in direct or indirect contact with each other. 14. The electrode connection structure according to claim 13 , further comprising a metal body that vertically sandwiches the chip and/or the substrate and fixes the first electrode and second electrodes by elastic force and that serves as a wiring. 15. The electrode connection structure according to claim 1 , wherein in a case where the first electrode and the second electrode are in direct contact with each other, a nearby contact region of the first electrode side is defined as a first contact part and a nearby contact region of the second electrode side is defined as a second contact part, or in a case where the first electrode and the second electrode are in indirect contact with each other through a conductive terminal, a nearby contact region of the first and second electrodes side is defined as a first contact part and a nearby contact region of the conductive terminal side is defined as a second contact part, a distance between the first contact part and the second contact part continuously increases in an outside direction of the first and second contact parts from a contact place of the first and second contact parts, and of a plated structure formed in a region where an angle between the first and second contact parts is within 15 degrees, an interface crystal structure in which an angular difference in crystal orientations at an association interface where crystal that grows from the first contact part and crystal that grows from the second contact part associate is within 15 degrees, is formed by not less than 50% of the entire association interface. 16. The electrode connection structure according to claim 15 , wherein a material of the plating has a crystal structure belonging to a cubical crystal, Electrode connection structure characterized in that said plating material has a, a <100> or <110> oriented crystal orientation to be grown by plating. 17. An electrode connection method of forming the electrode connection structure according to claim 1 , comprising: placing at least portions of the first and second electrodes in direct or indirect contact with each other on the at least one contact region; plating a periphery of the contact region and the first and second electrodes in a state where a plating solution is circulated in the periphery of the contact region; and stopping the plating process, in a state where a plated lamination surface nearest to the contact region is in contact with the plating solution, before a void shielded by a surface of the plated lamination formed on the respective first and second electrodes occurs. 18. The electrode connection method according to claim 17 , wherein the first and second electrodes are oppositely disposed in direct or indirect contact with each other through a convex portion, a plated lamination is formed by plating process from a contact region surface of the convex portion and opposed surfaces of the first and second electrodes, and a void is filled by the lamination forming in order from a region near the contact region surface of the convex portion.
Packaging processes not covered by the other groups of this subclass · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between a chip and a stacked lead frame, conducting package substrate or heat sink · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
between a chip and a stacked insulating package substrate, interposer or RDL · CPC title
Related publications grouped by family.
Answers are generated from the same data shown on this page.