Systems and methods for controlling release of transferable semiconductor structures

Patent metadata

Field	Value
Publication number	US-9601356-B2
Application number	US-201514743988-A
Country	US
Kind code	B2
Filing date	Jun 18, 2015
Priority date	Jun 18, 2014
Publication date	Mar 21, 2017
Grant date	Mar 21, 2017

Abstract

The disclosed technology relates generally to methods and systems for controlling the release of micro devices. Prior to transferring micro devices to a destination substrate, a native substrate is formed with micro devices thereon. The micro devices can be distributed over the native substrate and spatially separated from each other by an anchor structure. The anchors are physically connected/secured to the native substrate. Tethers physically secure each micro device to one or more anchors, thereby suspending the micro device above the native substrate. In certain embodiments, single tether designs are used to control the relaxation of built-in stress in releasable structures on a substrate, such as Si (1 1 1). Single tether designs offer, among other things, the added benefit of easier break upon retrieval from native substrate in micro assembly processes. In certain embodiments, narrow tether designs are used to avoid pinning of the undercut etch front.

First claim

What is claimed:

1. An array of micro devices, the array comprising:
a source substrate having a process side;
a sacrificial layer comprising sacrificial material on the process side of the source substrate;
a plurality of releasable micro objects formed at least in part on the sacrificial layer;
a plurality of anchor structures located on the process side of the source substrate, wherein the anchor structures remain rigidly attached to the source substrate in the absence of the sacrificial material; and
a plurality of tethers, wherein each tether of the plurality of tethers connects a releasable micro object of the plurality of releasable micro objects to a portion of one of the anchor structures, wherein:
the portion of the anchor to which the tether connects laterally separates adjacent releasable micro objects,
each releasable micro object is connected to an anchor by a single tether,
the source substrate is a growth substrate made of a substrate material on or over which the micro objects are formed and the tethers are made of a tether material,
either the tether material is the same material as the substrate material or the tether material is not disposed between the releasable micro objects and the source substrate, and
the tethers are shaped to fracture in response to pressure.

2. The array of claim 1 , wherein each of the plurality of tethers is sized and shaped to break when a corresponding micro object is contacted by an elastomer stamp for micro transfer printing from the source substrate to a target substrate, different from the source substrate.

3. The array of claim 1 , wherein the sacrificial material is a portion of the source substrate.

4. The array of claim 1 , wherein at least two or more of the plurality of releasable micro objects are connected to each of the plurality of anchor structures by a respective tether.

5. The array of claim 1 , wherein each of the plurality of anchors are characterized by locally concave or internal corners and each of the plurality of releasable micro objects is locally characterized by convex or external corners.

6. The array of claim 1 , wherein each of the plurality of tethers is a tether with a width of 10 μm to 40 μm.

7. The array of claim 1 , wherein each of the plurality of tethers is a tether with a narrow shape and a width of 1 μm to 5 μm, 5 μm to 10 μm, 10 μm to 15 μm, 15 μm to 20 μm, or 20 μm to 40 μm.

8. The array of claim 1 , wherein the sacrificial layer has an anisotropic crystal structure.

9. The array of claim 1 , wherein the sacrificial layer comprises a material selected from the group consisting of Silicon (1 1 1), InAlP, InP, GaAs, InGaAs, AlGaAs, GaSb, GaAlSb, AlSb, InSb, InGaAlSbAs, InAlSb, and InGaP.

10. The array of claim 1 , wherein the sacrificial layer comprises Silicon (1 1 1).

11. The array of claim 1 , wherein each of the tethers comprises one or more notches that provide a point of fracture when a respective releasable micro object is moved with respect to the anchor structures.

12. The array of claim 1 , wherein the source substrate comprises a member selected from the group consisting of Silicon (1 1 1), silicon, indium phosphide, gallium arsenide, and sapphire.

13. The array of claim 1 , wherein each of the tethers has an aspect ratio of greater than 1.732.

14. The array of claim 1 , wherein the sacrificial layer comprises InAlP.

15. A method of making thin and low-cost wafer-packaged micro-scale devices suitable for micro transfer printing using a (111) Silicon system, the method comprising:
providing a plurality of micro-scale devices;
individually assembling the micro-scale devices onto a carrier wafer using micro-transfer printing techniques, wherein the carrier wafer comprises Silicon (111) and a first dielectric layer;
embedding the assembled micro-scale devices within a second layer of dielectric on a side of the micro-scale devices opposite the carrier wafer after assembling the micro-scale devices on the carrier wafer;
patterning the first and second dielectric layers to define a perimeter of each of the micro-scale devices with anchors and tethers shaped to fracture in response to pressure that preserve the spatial configuration of the micro-scale devices with respect to the carrier wafer when the micro-scale devices are moved with respect to the carrier wafer, thereby providing a wafer-level thin wafer package having micro-scale devices suitable for micro transfer printing to other substrates, wherein the portion of the anchor to which the tether connects laterally separates adjacent releasable micro objects.

16. The method of claim 15 , comprising:
forming pad structures on at least one of the top or bottom surfaces of the micro-scale devices, thereby forming a surface-mountable device.

17. The method of claim 15 , wherein the micro scale devices each comprises an integrated circuit interconnected with at least two sensors and an antenna produced using the same wafer-level metallization.

18. The method of claim 15 , comprising:
micro transfer printing the micro-scale devices onto a reeled tape; and
applying the micro-scale devices to a destination substrate using a tape-fed high-speed chip shooter.

19. The method of claim 15 , comprising:
pre-molding the micro-scale devices using a wafer-fed die-attach tool, thereby forming package-on-lead-frames.

Assignees

• X Celeprint Ltd

Inventors

• Bower Christopher
• Meitl Matthew

Classifications

• H10W72/073

  of die-attach connectors · CPC title

• H10P72/7434

  used in a transfer process involving at least two transfer steps, i.e. including an intermediate handle substrate · CPC title

• H10P72/7402

  Wafer tapes, e.g. grinding or dicing support tapes · CPC title

• H10P72/74

  using temporarily an auxiliary support · CPC title

• H10W74/019

  using temporary auxiliary substrates (H10W74/017 takes precedence) · CPC title