Package on package thermal forcing device

Patent metadata

Field	Value
Publication number	US-9594113-B2
Application number	US-201414186733-A
Country	US
Kind code	B2
Filing date	Feb 21, 2014
Priority date	Feb 21, 2014
Publication date	Mar 14, 2017
Grant date	Mar 14, 2017

Abstract

Methods and apparatus for a package on package (POP) thermal forcing device. A thermal interposer includes a test probe guide and insulator top, a thermal conductor, the test probe guide and insulator top affixed to a top surface of the thermal conductor, a test probe, and a test probe guide and insulator bottom affixed to a bottom surface of the thermal conductor, the test probe guide and insulator bottom configured in a ring-like shape to enable the thermal conductor to pass through and make contact with a bottom of a package on package (PoP) integrated circuit (IC).

First claim

What is claimed is:

1. A thermal interposer comprising:
a test probe guide/insulator top;
a thermal conductor comprising a generally rectangular ring composed of thermally conductive and electrically insulating materials and adapted to receive the test probe guide/insulator top through an upper portion of the ring and a test probe guide/insulator bottom through a lower portion of the ring, the test probe guide/insulator top affixed to a top surface of the thermal conductor;
a test probe;
the test probe guide/insulator bottom affixed to a bottom surface of the thermal conductor, the test probe guide/insulator bottom configured to enable the thermal conductor to pass through and make contact with a bottom chip of a package on package (PoP) integrated circuit (IC); and
a plunger for communicating heat from a thermal control unit to the thermal conductor and, thereby to a top chip of the PoP IC so that the top chip and the bottom chip are efficiently and directly heated by thermal contact with the thermal conductor.

2. The thermal interposer of claim 1 wherein the test probe guide/insulator bottom comprises:
a generally rectangular ring;
apertures positioned at corners in the ring; and
alignment pins positioned through the apertures.

3. The thermal interposer of claim 2 wherein the thermally conductive material is selected from the group consisting of aluminum, copper, and aluminum nitride.

4. The thermal interposer of claim 2 wherein the electrically insulating material is selected from the group consisting of an amorphous thermoplastic polyetherimide (PEI) resin, a ceramic-filled polyehteretherketone (PEEK) compound, a ceramic, and an engineered plastic.

5. A system for burn-in testing of a package on package (PoP) integrated circuit (IC) without use of liquids or fluids for temperature control, the PoP IC having a bottom logic package and a top memory package stacked on the logic package, the system comprising:
a thermal control unit (TCU);
a plunger linked to the TCU;
a thermal interposer for transferring heat from the plunger and the logic package and for transferring electrical connections between the bottom logic package and the top memory package, the thermal interposer including:
a test probe insulator top; and
a thermal conductor comprising a generally rectangular ring composed of thermally conductive and electrically isolative material, the thermal conductor having a top surface in direct contact with the top memory package and a bottom surface in direct contact with the bottom logic package, wherein the thermal conductor is heated by the TCU via the plunger; and
a test probe insulator bottom to enable the thermal conductor to make contact with a bottom of the bottom logic package, wherein the test probe insulator top and bottom are fixed to the thermal conductor.

6. The system of claim 5 , wherein the TCU, the plunger and the thermal interposer maintain a substantially uniform temperature of the logic and memory packages during testing.

7. The system of claim 6 , wherein the substantially uniform temperature is between −55° C. and +150° C.

8. The system of claim 5 , wherein the TCU applies a force to seat the plunger, thermal interposer, and PoP IC together.

9. The system of claim 5 , wherein the TCU, the plunger and the thermal interposer are solid for efficient conduction of heat without fluid conduits and the plunger applies a force from the TCU to the top surface.

10. The system of claim 5 , wherein the bottom logic package and the top memory package are a memory chip and a logic chip, respectively.

Assignees

• Sensata Technologies Inc

Inventors

• Davis Richard A
• Lopez Christopher

Classifications

• G01R31/2817 Primary

  Environmental-, stress-, or burn-in tests (of IC's G01R31/2855; of individual semiconductors G01R31/2642; of other circuits G01R31/2849) · CPC title

• G01R31/2874 Primary

  related to temperature · CPC title

• G01R1/20

  Modifications of basic electric elements for use in electric measuring instruments; Structural combinations of such elements with such instruments · CPC title