Systems and methods for intelligent dimming control using TRIAC dimmers

Patent metadata

Field	Value
Publication number	US-9585222-B2
Application number	US-201414451656-A
Country	US
Kind code	B2
Filing date	Aug 5, 2014
Priority date	Jul 8, 2014
Publication date	Feb 28, 2017
Grant date	Feb 28, 2017

Abstract

Systems and methods for dimming control using TRIAC dimmers are provided. An example apparatus for a power conversion system includes: a process-and-drive component configured to receive an input signal and output a drive signal to a switch to affect a current that flows through a primary winding of a power conversion system. The input signal includes a first pulse associated with a first input period and a second pulse associated with a second input period. The drive signal is associated with a first modulation period for the first input period and a second modulation period for the second input period. The process-and-drive component is further configured to: determine the first modulation period for the first input period; change the drive signal between a first logic level and a second logic level at a modulation frequency during the first modulation period; determine the second modulation period for the second input period.

First claim

What is claimed is:

1. An apparatus for a power conversion system, the apparatus comprising:
a process-and-drive component configured to receive an input signal, process information associated with the input signal, and output a drive signal to a switch to affect a current that flows through a primary winding of a power conversion system;
wherein:
the input signal includes a first pulse associated with a first input period and a second pulse associated with a second input period; and
the drive signal is associated with a first modulation period for the first input period and a second modulation period for the second input period;

wherein the process-and-drive component is further configured to:
determine the first modulation period for the first input period;
change the drive signal between a first logic level and a second logic level at a modulation frequency during the first modulation period;
determine the second modulation period for the second input period; and
change the drive signal between the first logic level and the second logic level at the modulation frequency during the second modulation period;

wherein:
the first pulse corresponds to a first pulse width;
the second pulse corresponds to a second pulse width;
the first modulation period corresponds to a first duration; and
the second modulation period corresponds to a second duration;

wherein:
the first pulse width and the second pulse width are different in magnitude; and
the first duration and the second duration are equal in magnitude;

wherein the process-and-drive component includes:
a reference signal generator configured to receive the input signal and generate a reference signal based on at least information associated with the input signal;
an error amplifier configured to receive the reference signal and a current sensing signal and generate an amplified signal based on at least information associated with the reference signal and the current sensing signal;
a modulation component configured to generate a modulation signal based on at least information associated with the amplified signal; and
a drive component configured to generate the drive signal based on at least information associated with the modulation signal.

2. The apparatus of claim 1 wherein:
the drive signal is associated with a first off-time period for the first input period and a second off-time period for the second input period;
wherein the process-and-drive component is further configured to:
keep the drive signal at the second logic level during the first off-time period; and
keep the drive signal at the second logic level during the second off-time period.

3. The apparatus of claim 1 wherein the switch is configured to be closed in response to the drive signal being at the first logic level and be opened in response to the drive signal being at the second logic level.

4. The apparatus of claim 1 wherein the reference signal generator includes:
a first logic control component configured to receive the input signal and generate a first signal based on at least information associated with the input signal; and
a reference signal modulator configured to receive the first signal and change the reference signal based on at least information associated with the first signal.

5. The apparatus of claim 4 wherein the drive component includes:
a second logic control component configured to receive the modulation signal and a dimming signal generated by the first logic control component and generate a second signal based on at least information associated with the modulation signal and the dimming signal; and
a gate driver configured to generate the drive signal based on at least information associated with the second signal.

6. The apparatus of claim 1 wherein the modulation component includes:
a multiplier configured to receive the amplified signal and the input signal and generate a multiplied signal based on at least information associated with the amplified signal and the input signal; and
a modulator configured to receive the multiplied signal and the current sensing signal and generate the modulation signal based on at least information associated with the multiplied signal and the current sensing signal.

7. The apparatus of claim 1 wherein the error amplifier is further configured to generate the amplified signal with a capacitor.

8. The apparatus of claim 1 wherein:
the first pulse width is smaller than the second pulse width;
the first pulse width corresponds to the first duration; and
the second pulse width is larger than the second duration.

9. The apparatus of claim 1 wherein:
the input signal includes a third pulse associated with a third input period;
the drive signal is associated with a third modulation period for the third input period;
the process-and-drive component is further configured to:
determine the third modulation period for the third input period; and
change the drive signal between the first logic level and the second logic level at the modulation frequency during the third modulation period;

the third pulse corresponds to a third pulse width;
the third modulation period corresponds to a third duration;
the second pulse width and the third pulse width are different in magnitude; and
the second duration and the third duration are equal in magnitude.

10. An apparatus for a power conversion system, the apparatus comprising:
a process-and-drive component configured to receive an input signal, process information associated with the input signal, and output a drive signal to a switch to affect a current that flows through a primary winding of a power conversion system;
wherein:
the input signal includes one or more input pulses and a first input pulse, the one or more input pulses corresponding to one or more input periods respectively, the first input pulse corresponding to a first input period, the first input period being after the one or more input periods; and
the drive signal is associated with one or more modulation periods and a first modulation period, the one or more modulation periods corresponding to the one or more input periods respectively, the first modulation period corresponding to the first input period;

wherein:
the one or more input pulses are associated with one or more pulse widths respectively; and
the process-and-drive component is further configured to:
process information associated with the one or more pulse widths;
select a first smallest pulse width from the one or more pulse widths;
determine a first duration of the first modulation period based on at least information associated with the first smallest pulse width; and
change the drive signal between a first logic level and a second logic level at a modulation frequency during the first modulation period;

wherein the process-and-drive component is further configured to:
detect one or more phase angles associated with the one or more input pulses;
store the one or more phase angles into a queue;
select a smallest phase angle from the one or more phase angles, the smallest phase angle corresponding to the first smallest pulse width; and
determine the first duration based on at least information associated with the smallest phase angle.

11. The apparatus of claim 10 wherein:
the drive signal is associated with a first off-time period for the first input period; and
the process-and-drive component is further configured to keep the drive signal at the second logic level during the first off-time period.

12. The apparatus of claim 10 wherein the process-and-drive component is further configured to detect a first phase angle cor

Assignees

• On Bright Electronics Shanghai Co Ltd

Inventors

• Zhu Liqiang
• Yang Jiqing
• Li Zhuoyan
• Fang Lieyi

Classifications

• H05B47/16

  by timing means · CPC title

• H05B39/044 Primary

  continuously (H05B39/042 takes precedence) · CPC title

• H05B33/0887 Primary

  Electricity · mapped topic

• H05B45/10

  Controlling the intensity of the light · CPC title

• H05B45/385

  using flyback topology · CPC title