Systems and methods for dimming control with capacitive loads

Patent metadata

Field	Value
Publication number	US-9414455-B2
Application number	US-201414562432-A
Country	US
Kind code	B2
Filing date	Dec 5, 2014
Priority date	Apr 22, 2011
Publication date	Aug 9, 2016
Grant date	Aug 9, 2016

Abstract

System and method for dimming control. The system includes a system controller including a first controller terminal and a second controller terminal, a transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal, and a resistor including a first resistor terminal and a second resistor terminal. The system controller is configured to generate a first signal at the first controller terminal based on an input signal and to generate a second signal at the second controller terminal based on the first signal. The first transistor terminal is coupled to the second controller terminal. The first resistor terminal is coupled to the second transistor terminal. The second resistor terminal is coupled to the third transistor terminal. The transistor is configured to receive the second signal at the first transistor terminal and to change between two conditions in response to the second signal.

First claim

What is claimed is:

1. A system for dimming control, the system comprising:
a system controller including a first controller terminal and a second controller terminal;
a transistor including a first transistor terminal, a second transistor terminal and a third transistor terminal; and
a resistor including a first resistor terminal and a second resistor terminal;
wherein:
the system controller is configured to generate a first signal at the first controller terminal based at least in part on an input signal and to generate a second signal at the second controller terminal based at least in part on the first signal;
the first resistor terminal is coupled to the second transistor terminal;
the second resistor terminal is coupled to the third transistor terminal; and
the transistor is configured to receive the second signal at the first transistor terminal and to change between a first condition and a second condition in response to the second signal;

wherein:
the first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time;
the second signal keeps at the second logic level during the first period of time and the third period of time; and
the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time.

2. The system of claim 1 wherein:
the second transistor terminal is biased at a first voltage; and
the first voltage changes with time.

3. The system of claim 1 wherein the transistor is configured to be turned on under the first condition and to be turned off under the second condition.

4. The system of claim 1 wherein the first logic level is a logic high level, and the second logic level is a logic low level.

5. The system of claim 1 wherein the first period of time is adjacent to the second period of time.

6. The system of claim 5 wherein:
the first period of time is adjacent to the third period of time; and
the third period of time is adjacent to the fourth period of time.

7. The system of claim 5 wherein:
the second period of time and the third period of time share a same starting time; and
the second period of time and the fourth period of time share a same ending time.

8. The system of claim 1 wherein:
at an ending time of the second period of time, the first signal becomes constant in magnitude at the first logic level; and
at a delayed time, the second signal becomes constant in magnitude at the second logic level, the delayed time being after the ending time.

9. The system of claim 1 wherein the first resistor terminal is coupled, directly, to the second transistor terminal.

10. The system of claim 1 wherein the second resistor terminal is coupled, directly, to the third transistor terminal.

11. A method for dimming control, the method comprising:
receiving an input signal;
generating a first signal based at least in part on the input signal;
generating a second signal based at least in part on the first signal;
receiving the second signal at a transistor; and
changing the transistor between a first condition and a second condition based at least in part on the second signal;
wherein:
the first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time;
the second signal keeps at the second logic level during the first period of time and the third period of time; and
the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time.

12. The method of claim 11 wherein the changing the transistor between a first condition and a second condition includes:
turning on the transistor under the first condition; and
turning off the transistor under the second condition.

13. The method of claim 11 wherein the first logic level is a logic high level, and the second logic level is a logic low level.

14. The method of claim 11 wherein the first period of time is adjacent to the second period of time.

15. The method of claim 14 wherein:
the first period of time is adjacent to the third period of time; and
the third period of time is adjacent to the fourth period of time.

16. The method of claim 15 wherein:
the second period of time and the third period of time share a same starting time; and
the second period of time and the fourth period of time share a same ending time.

17. The method of claim 11 wherein:
at an ending time of the second period of time, the first signal becomes constant in magnitude at the first logic level; and
at a delayed time, the second signal becomes constant in magnitude at the second logic level, the delayed time being after the ending time.

18. A system controller for dimming control, the system controller comprising:
a first controller terminal; and
a second controller terminal;
wherein the system controller is configured to:
generate a first signal at the first controller terminal based at least in part on an input signal;
generate a second signal based at least in part on the first signal; and
output the second signal at the second controller terminal to change a transistor between a first condition and a second condition;

wherein:
the first signal is at a first logic level during a first period of time and changes between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time;
the second signal keeps at the second logic level during the first period of time and the third period of time; and
the second signal changes from the second logic level to the first logic level after the third period of time and remains at the first logic level during the fourth period of time.

19. The system controller of claim 18 wherein the first period of time is adjacent to the second period of time.

20. The system controller of claim 19 wherein:
the first period of time is adjacent to the third period of time; and
the third period of time is adjacent to the fourth period of time.

21. The system controller of claim 20 wherein:
the second period of time and the third period of time share a same starting time; and
the second period of time and the fourth period of time share a same ending time.

22. The system controller of claim 18 wherein:
at an ending time of the second period of time, the first signal becomes constant in magnitude at the first logic level; and
at a delayed time, the second signal becomes constant in magnitude at the second logic level, the delayed time being after the ending time.

23. A method for dimming control, the method comprising:
receiving an input signal;
generating a first signal based at least in part on the input signal, the first signal being at a first logic level during a first period of time and changing between the first logic level and a second logic level during a second period of time, the second period of time including a third period of time and a fourth period of time;
generating a secon

Assignees

• On Bright Electronics Shanghai Co Ltd

Inventors

• Zhou Jun
• Xiong Zhongliang
• Li Miao
• Cao Yaming
• Luo Qiang
• Fang Lieyi

Classifications

• H05B45/10

  Controlling the intensity of the light · CPC title

• H05B33/0851

  Electricity · mapped topic

• H05B33/0845 Primary

  Electricity · mapped topic

• H05B37/02

  Electricity · mapped topic

• H05B33/0815

  Electricity · mapped topic