High-performance LED fabrication

Patent metadata

Field	Value
Publication number	US-9583678-B2
Application number	US-201514615315-A
Country	US
Kind code	B2
Filing date	Feb 5, 2015
Priority date	Sep 18, 2009
Publication date	Feb 28, 2017
Grant date	Feb 28, 2017

Abstract

High-performance light-emitting diode together with apparatus and method embodiments thereto are disclosed. The light emitting diode devices emit at a wavelength of 390 nm to 470 nm or at a wavelength of 405 nm to 430 nm. Light emitting diode devices are characterized by having a geometric relationship (e.g., aspect ratio) between a lateral dimension of the device and a vertical dimension of the device such that the geometric aspect ratio forms a volumetric light emitting diode that delivers a substantially flat current density across the device (e.g., as measured across a lateral dimension of the active region). The light emitting diode devices are characterized by having a current density in the active region of greater than about 175 Amps/cm 2 .

First claim

What is claimed is:

1. A light emitting flip-chip on mirror apparatus comprising:
an electrically-conductive n-doped bulk GaN-containing substrate;
an epitaxially-grown n-type layer overlying the substrate;
an epitaxially-grown active region overlying the epitaxially-grown n-type layer;
an epitaxially-grown p-type layer overlying the epitaxially-grown active region;
an p-contact overlying at least a portion of the epitaxially-grown p-type layer;
an opening through the epitaxially-grown p-type layer and the active region that exposes the n-type layer;
an n-contact formed in the opening to provide an electrically-conductive path to the GaN-containing substrate; and
a submount comprising:
a second substrate;
an insulating layer overlying the second substrate;
at least a first conductive lower mirror region and a second conductive lower mirror region overlying the insulating layer to provide separate electrical connection to the n-contact and p-contact;
a third mirror region overlying a gap between the first conductive lower mirror region and the second conductive lower mirror to provide a higher reflectivity than the submount;
a first metal containing composition in direct electrical contact with at least a portion of the first lower mirror region and in direct electrical contact with the p-contact, and
a second metal containing composition in direct electrical contact with at least a portion of the second lower mirror region and in direct electrical contact with the n-contact.

2. The apparatus of claim 1 , further comprising:
a solder material in direct contact with the p-contact to provide electrical connection between the p-contact and the first metal containing composition in contact with the first conductive lower mirror region, and
a solder material in direct contact with the n-contact to provide electrical connection between the n-contact and the second metal containing composition in contact with the second conductive lower mirror region.

3. The apparatus of claim 2 , further comprising a material that has low wettability for solder overlying a portion of the n-contact that is in direct contact with the solder material.

4. The apparatus of claim 1 , wherein the p-contact and the n-contact do not overlap.

5. The apparatus of claim 1 , wherein the p-contact is characterized by a reflectivity greater than 90%.

6. The apparatus of claim 1 , wherein at least a portion of the first conductive lower mirror region is characterized by a reflectivity greater than 90%.

7. The apparatus of claim 1 , wherein at least a portion of the second conductive lower mirror region is characterized by a reflectivity greater than 90%.

8. The apparatus of claim 1 , wherein at least one of the first conductive lower mirror region and the second conductive lower mirror region is characterized by a reflectivity greater than 90%.

9. The apparatus of claim 1 , wherein the GaN-containing substrate comprises a plurality of surfaces, and wherein at least one of the plurality of surfaces is roughened.

10. The apparatus of claim 1 , wherein at least one of a top surface and a side surface of the GaN-containing substrate is roughened.

11. The apparatus of claim 1 , wherein at least one of the first conductive lower mirror region and the second conductive lower mirror region comprises a first dielectric stack.

12. The apparatus of claim 11 where the first dielectric stack comprises at least one of, SiO x , SiN, TaO x , TiO x , NbO x , and TiNbO x .

13. The apparatus of claim 11 , wherein the first dielectric stack comprises at least two layers, wherein each of the at least two layers is characterized by a thickness from about 20 nm to about 500 nm.

14. The apparatus of claim 1 , wherein the electrically-conductive n-doped bulk GaN-containing substrate has a thickness from about 20 microns thick to about 200 microns thick.

15. The apparatus of claim 1 , wherein the electrically-conductive n-doped bulk GaN-containing substrate is doped with a dopant concentration ranging from about 5 10 17 cm −3 to about 10 19 cm −3 .

16. The apparatus of claim 1 , wherein at least one of the first conductive lower mirror region, the second conductive lower mirror region, and the third mirror region comprises at least one of Al and Ag.

17. The apparatus of claim 1 , wherein at least one of the p-contact and the n-contact comprises at least one of Al and Ag.

18. A lighting system comprising:
a base member configurable to provide an electrical connection to a power source;
at least one light emitting diode die, electrically connected to the power source comprising:
an electrically-conductive n-doped bulk GaN-containing substrate that is greater than or equal to 20 microns thick;
an epitaxially-grown n-type layer overlying the substrate;
an epitaxially-grown active region overlying the epitaxially-grown n-type layer;
an epitaxially-grown p-type layer overlying the epitaxially-grown active region;
an p-contact overlying at least a portion of the epitaxially-grown p-type layer;
an opening through the epitaxially-grown p-type layer and the active region that exposes n-type material;
an n-contact formed in the opening to provide an electrically-conductive path to the substrate;
a submount comprising: and
a second substrate;
an insulating layer overlying the second substrate;
at least a first conductive lower mirror region and a second conductive lower mirror region overlying the insulating layer to provide separate electrical connection to the n-contact and p-contact;
a third mirror region overlying a gap between the first conductive lower mirror region and the second conductive lower mirror to provide a higher reflectivity than the submount;
a first metal containing composition in direct electrical contact with at least a portion of the first lower mirror region and in direct electrical contact with the p-contact, and
a second metal containing composition in direct electrical contact with at least a portion of the second lower mirror region and in direct electrical contact with the n-contact.

19. The lighting system of claim 18 , further comprising a housing.

20. The lighting system of claim 18 , further comprising a heatsink coupled to the submount.

Assignees

• Soraa Inc

Inventors

• Cich Michael J
• David Aurelien J F
• Hurni Christophe
• Aldaz Rafael
• Krames Michael Ragan

Classifications

• H10W72/20

  Bump connectors, e.g. solder bumps or copper pillars; Dummy bumps; Thermal bumps · CPC title

• H01L33/32 Primary

  Electricity · mapped topic

• H01L33/60

  Electricity · mapped topic

• F21V29/70

  characterised by passive heat-dissipating elements, e.g. heat-sinks · CPC title

• H01L33/405

  Electricity · mapped topic