Semiconductor device

Patent metadata

Field	Value
Publication number	US-9570436-B2
Application number	US-201314407922-A
Country	US
Kind code	B2
Filing date	Jun 5, 2013
Priority date	Jun 20, 2012
Publication date	Feb 14, 2017
Grant date	Feb 14, 2017

Abstract

The present invention provides a semiconductor device that prevents destruction due to an avalanche breakdown and that has a high tolerance against breakdown by configuring the device so as to have a punch-through breakdown function therein and such that the breakdown voltage of a punch-through breakdown is lower than an avalanche breakdown voltage so that an avalanche breakdown does not occur.

First claim

The invention claimed is:

1. A semiconductor device comprising:
A semiconductor structure configured to let a breakdown current occur due to a punch through breakdown,
wherein the breakdown current flows by passing through a heterojunction interface that comprises polarization charges having a same polarity as that of carriers carrying the breakdown current,
wherein the semiconductor structure comprises:
a first semiconductor region disposed over a substrate and having a first conductivity type;
a second semiconductor region having the first conductivity type; and
a third semiconductor region located between the first and second semiconductor regions and having a second conductivity type,
wherein the semiconductor device comprises:
a first electrode having an ohmic characteristic with respect to the first semiconductor region;
a second electrode having an ohmic characteristic with respect to the second semiconductor region; and
a third electrode having a contact with the second semiconductor region and adjacent to the second electrode,
wherein when a voltage positive or negative with respect to the first and third electrodes is applied to the second electrode during an On state, an On current by carriers having the first conductivity type flows between the second and third electrodes,
wherein when a voltage positive or negative with respect to the first and third electrodes is applied to the second electrode during an Off state, the breakdown current by carriers having the first conductivity type flows between the second electrode and the first electrode, and
wherein a current value of a leakage current flowing between the second and third electrodes is at most equal to or less than 1/1,000 of a current value of the On current.

2. The semiconductor device according to claim 1 ,
wherein a semiconductor of the semiconductor structure has a hexagonal crystal structure, and the breakdown current flows in a direction of a c-axis of the semiconductor.

3. The semiconductor device according to claim 1 , wherein the punch-through breakdown occurs by depletion of the third semiconductor region located between the substrate and the second electrode.

4. The semiconductor device according to claim 1 , wherein the first electrode is electrically short-circuited with the third electrode.

5. The semiconductor device according to claim 1 , wherein the third semiconductor region is electrically floating.

6. The semiconductor device according to claim 1 ,
wherein the semiconductor device is a field effect transistor,
wherein the second electrode is a drain electrode,
wherein the third electrode is a source electrode, and
wherein the semiconductor device further comprises a gate electrode as a fourth electrode between the second electrode and the third electrode.

7. The semiconductor device according to claim 1 ,
wherein the semiconductor device is a Schottky barrier diode,
wherein the second electrode is a cathode electrode,
wherein the third electrode is an anode electrode having a Schottky characteristic with respect to the second semiconductor region.

8. The semiconductor device according to claim 1 , wherein the semiconductor device is a field effect transistor,
wherein the second electrode is a drain electrode,
wherein the third electrode is a source electrode,
wherein the semiconductor device further comprises a gate electrode as a fourth electrode between the second electrode and the third electrode, and
wherein the semiconductor device is cascoded with another transistor in which an avalanche breakdown occurs, by the source electrode being short-circuited with a drain electrode of the another transistor.

9. The semiconductor device according to claim 1 , wherein a breakdown voltage of the punch-through breakdown is lower than an avalanche breakdown voltage.

10. The semiconductor device according to claim 1 , wherein the semiconductor device is a unipolar transistor or a unipolar diode.

11. The semiconductor device according to claim 1 , wherein a semiconductor of the semiconductor structure is a wide band gap semiconductor.

12. A semiconductor device comprising a semiconductor structure configured to let a breakdown current occur due to a punch through breakdown, wherein the semiconductor structure comprises:
a first semiconductor region disposed over a substrate and having a first conductivity type;
a second semiconductor region having the first conductivity type; and
a third semiconductor region located between the first and second semiconductor regions and having a second conductivity type,
wherein the semiconductor device comprises:
a first electrode having an ohmic characteristic with respect to the first semiconductor region;
a second electrode having an ohmic characteristic with respect to the second semiconductor region; and
a third electrode having a contact with the second semiconductor region and adjacent to the second electrode,
wherein when a voltage positive or negative with respect to the first and third electrodes is applied to the second electrode during an On state, an On current by carriers having the first conductivity type flows between the second and third electrodes,
wherein when a voltage positive or negative with respect to the first and third electrodes is applied to the second electrode during an Off state, the breakdown current by carriers having the first conductivity type flows between the second electrode and the first electrode, and
wherein a current value of a leakage current flowing between the second and third electrodes is at most equal to or less than 1/1,000 of a current value of the On current.

13. The semiconductor device according to claim 12 , wherein the punch-through breakdown occurs by depletion of the third semiconductor region located between the substrate and the second electrode.

14. The semiconductor device according to claim 12 , wherein the first electrode is electrically short-circuited with the third electrode.

15. The semiconductor device according to claim 13 , wherein the first electrode is electrically short-circuited with the third electrode.

16. The semiconductor device according to claim 12 , wherein the third semiconductor region is electrically floating.

17. The semiconductor device according to claim 12 , wherein the semiconductor device is a field effect transistor,
wherein the second electrode is a drain electrode,
wherein the third electrode is a source electrode, and
wherein the semiconductor device further comprises a gate electrode as a fourth electrode between the second electrode and the third electrode.

18. The semiconductor device according to claim 12 , wherein the semiconductor device is a Schottky barrier diode,
wherein the second electrode is a cathode electrode,
wherein the third electrode is an anode electrode having a Schottky characteristic with respect to the second semiconductor layer.

19. The semiconductor device according to claim 12 , wherein the semiconductor device is a field effect transistor,
wherein the second electrode is a drain electrode,
wherein the third electrode is a source electrode,
wherein the semiconductor device further comprises a gate electrode as a fourth electrode between the second electrode and the third electrode, and
wherein the semiconductor device is cascoded with another transistor in which an avalanche breakdown occurs, by the source electrode being short-circuited with a drain electrode of the another transistor.

Assignees

• Nat Inst Advanced Ind Science & Tech

Inventors

• Nakajima Akira
• Nishizawa Shinichi
• Ohashi Hiromichi

Classifications

• H10P32/172

  being crystalline silicon carbide · CPC title

• H10D64/01366

  the semiconductor being silicon carbide · CPC title

• H10D62/357

  of FETs · CPC title

• H10D62/378

  Contact regions to the substrate regions · CPC title

• H10D62/221

  of FETs · CPC title