Semiconductor device

Patent metadata

Field	Value
Publication number	US-9564491-B2
Application number	US-201514963825-A
Country	US
Kind code	B2
Filing date	Dec 9, 2015
Priority date	Dec 15, 2014
Publication date	Feb 7, 2017
Grant date	Feb 7, 2017

Abstract

According to one embodiment, a semiconductor device includes an n-type semiconductor layer, a first electrode, and a nitride semiconductor layer. The n-type semiconductor layer includes diamond. The nitride semiconductor layer is provided between the n-type semiconductor layer and the first electrode. The nitride semiconductor layer includes Al x Ga 1−x N (0≦x≦1) and is of n-type.

First claim

What is claimed is:

1. A semiconductor device, comprising:
an n-type semiconductor layer including diamond;
a first electrode; and
a nitride semiconductor layer provided between the n-type semiconductor layer and the first electrode, the nitride semiconductor layer being of n-type,
the nitride semiconductor layer including a structural body including a plurality of Al x Ga 1-x N (0<x≦1) layers and a plurality of Al y Ga 1-y N (0≦y<x) layers,
the Al x Ga 1-x N (0<x≦1) layers and the Al y Ga 1-y N (0≦y<x) layers being arranged alternately in a first direction from the n-type semiconductor layer toward the first electrode.

2. The device according to claim 1 , wherein the structural body includes a plurality of Al x1 Ga 1−x1 N (0≦x1<1) layers and a plurality of AIN layers,
the Al x1 Ga 1−x1 N (0≦x1<1) layers and the AIN layers are arranged alternately in the first direction.

3. The device according to claim 1 , wherein
the structural body includes a plurality of GaN layers and a plurality of Al x2 Ga 1−x2 N (0<x2≦1) layers,
the GaN layers and the Al x2 Ga 1−x2 N (0<x2≦1) layers are arranged alternately in the first direction.

4. The device according to claim 1 , wherein the x is not less than 0.7 and not more than 0.9.

5. The device according to claim 1 , wherein
the nitride semiconductor layer includes a first region and a second region, the first region including Al x Ga 1−x N (0<x≦1), the second region including Al y Ga 1−y N (0≦y<x), and
the first region is provided between the second region and the n-type semiconductor layer.

6. The device according to claim 5 , wherein
the x is not less than 0.7 and not more than 0.9, and
the y is not less than 0.4 and not more than 0.6.

7. The device according to claim 5 , wherein
the first region includes a plurality of AlN layers and a plurality of Al x Ga 1−x N (0<x≦1) layers, the AlN layers and the Al x Ga 1−x N (0<x≦1) layers being arranged alternately in a first direction from the n-type semiconductor layer toward the first electrode,
the second region includes a plurality of GaN layers and a plurality of Al y Ga 1−y N (0≦y<x) layers, the GaN layers and the Al y Ga 1-y N (0≦y<x) layers being arranged alternately in the first direction, and
an average Al composition ratio in the first region is higher than an average Al composition ratio in the second region when a thickness of the first region is t1 (nanometers), a thickness of the second region is t2 (nanometers), a total thickness of the AlN layers is ta (nanometers), a total thickness of the Al x Ga 1−x N (0<x≦1) layers is tx (nanometers), a total thickness of the Al y Ga 1−y N (0≦y<x) layers is ty (nanometers), the average Al composition ratio of the first region is (ta+x×tx)/t1, and the average Al composition ratio of the second region is (y×ty)/t2.

8. The device according to claim 7 , wherein
the average Al composition ratio in the first region is not less than 0.7 and not more than 0.9, and
the average Al composition ratio in the second region is not less than 0.4 and not more than 0.6.

9. The device according to claim 1 , wherein the first electrode includes at least one selected from Ti, Mo, Ta, Zr, and Hf.

10. The device according to claim 1 , further comprising a first p-type semiconductor layer including diamond,
the n-type semiconductor layer being positioned between the first electrode and the first p-type semiconductor layer.

11. The device according to claim 10 , further comprising a second electrode electrically connected to the first p-type semiconductor layer.

12. The device according to claim 10 , further comprising an intermediate semiconductor layer provided between the n-type semiconductor layer and the first p-type semiconductor layer, the intermediate semiconductor layer including diamond,
an impurity concentration in the intermediate semiconductor layer being lower than an impurity concentration in the n-type semiconductor layer, and being lower than an impurity concentration in the first p-type semiconductor layer.

13. The device according to claim 10 , further comprising a second p-type semiconductor layer including diamond,
the n-type semiconductor layer including a portion provided between the first p-type semiconductor layer and the second p-type semiconductor layer.

14. The device according to claim 13 , wherein the second p-type semiconductor layer is arranged with the nitride semiconductor layer in a direction intersecting a first direction from the n-type semiconductor layer toward the first electrode.

15. The device according to claim 14 , further comprising a third electrode electrically connected to the second p-type semiconductor layer.

16. The device according to claim 1 , wherein the nitride semiconductor layer has a first side face intersecting a plane perpendicular to a first direction from the n-type semiconductor layer toward the first electrode,
the n-type semiconductor layer has a second side face intersecting the plane, and
the second side face is along a plane including the first side face.

17. The device according to claim 16 , further comprising an insulating layer,
the nitride semiconductor layer further including a first face and a second face, the first face being in contact with the n-type semiconductor layer, one portion of the second face being in contact with the first electrode,
the insulating layer being in contact with one other portion of the second face, the first side face, and the second side face.

18. The device according to claim 17 , wherein
the insulating layer includes a portion disposed in at least one selected from a first position, a second position, and a third position,
the first position is between the first electrode and the second face,
the second position is between the first electrode and the first side face, and
the third position is between the first electrode and the second side face.

Assignees

• Toshiba Kk

Inventors

• Suzuki Mariko
• Sakai Tadashi

Classifications

• H10D62/128

  Anode regions of diodes · CPC title

• H01L29/7371

  Electricity · mapped topic

• H01L29/155

  Electricity · mapped topic

• H01L29/267

  Electricity · mapped topic

• H01L29/2003

  Electricity · mapped topic