Flexible printed circuit

Patent metadata

Field	Value
Publication number	US-9560748-B2
Application number	US-201313734189-A
Country	US
Kind code	B2
Filing date	Jan 4, 2013
Priority date	Jan 4, 2013
Publication date	Jan 31, 2017
Grant date	Jan 31, 2017

Abstract

A flexible printed circuit includes a first insulating substrate layer and a first electrically conductive layer located adjacent to a first side of the insulating substrate layer. The first conductive layer has a first portion that is substantially solid and a second portion having a multiplicity of voids in the first conductive layer in a pattern for providing a lower stiffness in the second portion relative to the first portion, thereby providing more flexibility in the second portion relative to the first portion.

First claim

What is claimed is:

1. A flexible printed circuit, comprising:
a first insulating substrate layer;
a top electrically conductive shielding layer located adjacent to a first side of the first insulating substrate layer, the top electrically conductive shielding layer having a first portion that is substantially solid and a second portion having a multiplicity of voids in a pattern for providing a lower stiffness in the second portion relative to the first portion, thereby providing more flexibility in the second portion relative to the first portion;
a middle electrically conductive layer comprising a plurality of electrically conductive traces for conducting one or more of electrical signals and electrical power from a first part of the flexible printed circuit to a second part of the flexible printed circuit, the middle conductive layer being located adjacent to a second side of the first insulating substrate layer;
a second insulating layer, the middle electrically conductive layer being located adjacent to a first side of the second insulating layer; and
a bottom electrically conductive shielding layer located adjacent to a second side of the second insulating layer, the bottom electrically conductive shielding layer having a first portion that is substantially solid and a second portion having a multiplicity of voids in a pattern for providing a lower stiffness in the second portion of the bottom electrically conductive shielding layer relative to the first portion of the bottom electrically conductive shielding layer, thereby providing more flexibility in the second portion of the bottom electrically conductive shielding layer relative to the first portion of the bottom electrically conductive shielding layer,
wherein the sections between adjacent voids in the top electrically conductive shielding layer and bottom electrically conductive shielding layer are substantially solid, and when the top electrically conductive shielding layer, middle conductive layer, and bottom electrically conductive shielding layer are stacked in a vertical configuration, the sections in each of the shielding layers are oriented such that they are not parallel to the conductive traces of the middle conductive layer.

2. The flexible printed circuit of claim 1 , wherein the top electrically conductive shielding layer comprises a plurality of electrically conductive leads for conducting one or more of electrical signals and electrical power to the electrically conductive traces.

3. The flexible printed circuit of claim 1 , wherein the top electrically conductive shielding layer is made of copper.

4. The flexible printed circuit of claim 1 , wherein an adhesive layer is located between the top electrically conductive shielding layer and the first insulating substrate layer.

5. The flexible printed circuit of claim 1 , wherein an adhesive layer is located between the middle electrically conductive layer and the first insulating substrate layer.

6. The flexible printed circuit of claim 1 , wherein the voids of the top and bottom electrically conductive shielding layers each have a cross-section that is substantially square in shape.

7. The flexible printed circuit of claim 1 , wherein the top and bottom electrically conductive shielding layers resist electromagnetic radiation from traveling between the traces and an environment external to the flexible printed circuit.

8. The flexible printed circuit of claim 1 , further comprising a first transition region between the first and second portion of the top electrically conductive shielding layer and a second transition region between the first and second portion of the bottom electrically conductive shielding layer, wherein the first and second transition regions are substantially curvilinear in shape.

9. The flexible printed circuit of claim 6 , wherein the voids of the top and bottom electrically conductive shielding layers are approximately 0.5 mm by 0.5 mm in size.

10. The flexible printed circuit of claim 9 , wherein the distance between adjacent voids in the top and bottom electrically conductive shielding layers is approximately 0.2 mm.

11. The flexible printed circuit of claim 1 , wherein the voids of the top electrically conductive shielding layer extend across substantially the entire second portion of the top electrically conductive shielding layer.

12. The flexible printed circuit of claim 1 , wherein the voids of the bottom electrically conductive shielding layer extend across substantially the entire second portion of the bottom electrically conductive shielding layer.

13. The flexible printed circuit of claim 1 wherein the pattern of voids in the top electrically conductive shielding layer and the pattern of voids in the bottom electrically conductive shielding layer are substantially aligned when the top electrically conductive shielding layer, middle conductive layer, and bottom electrically conductive shielding layer are stacked in a vertical configuration.

Assignees

• Briggs Drew Stone
• Perzanoski Scott C
• Bose Corp

Inventors

• Briggs Drew Stone
• Perzanoski Scott C

Classifications

• H05K1/0225 Primary

  Single or multiple openings in a shielding, ground or power plane (H05K1/0227 takes precedence) · CPC title

• H05K1/028 Primary

  Bending or folding regions of flexible printed circuits (H05K1/0283 takes precedence) · CPC title

• H05K1/0218

  by printed shielding conductors, ground planes or power plane (H05K1/0236 takes precedence) · CPC title

• H05K2201/0715

  provided by an outer layer of PCB · CPC title

• H05K1/0298

  Multilayer circuits · CPC title