Mapping circuits

Patent metadata

Field	Value
Publication number	US-9552446-B2
Application number	US-12245308-A
Country	US
Kind code	B2
Filing date	May 16, 2008
Priority date	May 16, 2008
Publication date	Jan 24, 2017
Grant date	Jan 24, 2017

Abstract

A method, apparatus and program product are provided for mapping electrical circuits. A user provides an electronic record of one or more rooms with outlets to be mapped and installs a module in each outlet to be mapped. Using an interactive program, the user prepares a diagram of a circuit box. The user triggers a probe to propagate a signal detectable by said modules over a circuit and to provide circuit information. The user retrieves the circuit information from the modules. Then, the interactive program associates the circuit information from each module with a corresponding outlet on said electronic record of one or more rooms.

First claim

What is claimed is:

1. A method for mapping outlets, the method comprising the steps of:
providing an electronic record of one or more rooms with outlets to be mapped;
installing multiple modules, where each module is installed in one of a plurality of outlets to be mapped;
preparing a diagram of a circuit box showing and identifying circuit interrupts for a plurality of electrical circuits;
triggering a probe to propagate a signal at one of said circuit interrupts detectable by said modules over a circuit and to provide circuit information, said circuit information tied to said circuit interrupts identified in said diagram;
retrieving said circuit information from said modules; and
associating said circuit information from each module with a corresponding outlet on said electronic record of said one or more rooms.

2. The method of claim 1 , wherein the circuit information is embedded in said signal.

3. The method of claim 1 , wherein the triggering step is repeated for one or more additional circuits.

4. The method of claim 1 , wherein said retrieving step comprises selecting a module corresponding to an outlet on said electronic record of one or more rooms and retrieving the circuit information from the module using RFID receiver.

5. The method of claim 1 , wherein said associating step comprises entering said circuit information into an interactive program.

6. The method of claim 1 , wherein said circuit information comprises circuit identification.

7. The method of claim 6 , wherein said circuit information further comprises one or more characteristics of said circuit obtained from measurements made by said module.

8. The method of claim 6 , wherein said circuit information further comprises one or more characteristics of said circuit obtained from the circuit box diagram.

Assignees

• Calcaterra Jeffrey Alan
• Miller Steven Michael
• Gutierrez-Rivas Humberto
• IBM

Inventors

• Calcaterra Jeffrey Alan
• Miller Steven Michael
• Gutierrez-Rivas Humberto

Classifications

• G06F30/13 Primary

  Architectural design, e.g. computer-aided architectural design [CAAD] related to design of buildings, bridges, landscapes, production plants or roads · CPC title

• G01R19/2513

  Arrangements for monitoring electric power systems, e.g. power lines or loads; Logging · CPC title

• G01R31/69 Primary

  of terminals at the end of a cable or a wire harness; of plugs; of sockets, e.g. wall sockets or power sockets in appliances · CPC title

• G06F17/5004 Primary

  Physics · mapped topic

• G01R31/045

  Physics · mapped topic