Line-end cutting method for fin structures of FinFETs formed by double patterning technology

Patent metadata

Field	Value
Publication number	US-9536987-B2
Application number	US-201414764175-A
Country	US
Kind code	B2
Filing date	Nov 24, 2014
Priority date	Jul 31, 2014
Publication date	Jan 3, 2017
Grant date	Jan 3, 2017

Abstract

A line-end cutting method for fin structures of FinFETs formed by double patterning technology firstly utilizes the SiN hard mask lines to form fin structures and then performs lithography and etching processes to form line-end cuts. Since the depth of the line-end cuts is large, there is enough time and space to regulate the etching recipe so as to balance the etching rate of multiple layers including the spin-on-carbon layer, the SiN layer, the SiO 2 layer and the silicon substrate, thereby forming the fin structures with line-end cuts having flatter bottom topography, preventing the formation of silicon protrusions or silicon cones during the etching process and improving the device electrical performance.

First claim

The invention claimed is:

1. A line-end cutting method for fin structures of FinFETs formed by double patterning technology comprising:
Step S 01 , providing a substrate of a semiconductor device and depositing multiple layers comprising a SiN layer on the substrate;
Step S 02 , etching the multiple layers on the SiN layer by using a sacrificial-core-patterning process to form sidewalls; using the side walls as a mask and etching the remaining multiple layers comprising the SiN layer to form SiN hard mask lines;
Step S 03 , etching the substrate by using the SiN hard mask lines as a mask to form fin structures having silicon trenches therebetween;
Step S 04 , coating a mask layer and photoresist on the fin structures and patterning the photoresist to form a line-end cut pattern in the photoresist;
Step S 05 , using the patterned photoresist in the step S 04 as a mask and etching to remove the SiN hard mask lines and the substrate at regions need to be cut, so as to form line-end cuts having flat bottom surface;
Step S 06 , removing the coated mask layer in the step S 04 to obtain the fin structures with line-end cuts;
wherein the multiple layers comprise a first SiO 2 layer, a first SiN layer, a first amorphous carbon layer, a second SiN layer, a second amorphous carbon layer and a nitrogen-free anti-reflection layer deposited successively on the substrate from bottom to top;
wherein the step S 02 comprises:
Step S 021 , depositing an organic anti-reflection layer on the nitrogen-free anti-reflection layer and coating photoresist on the organic anti-reflection layer; defining a sacrificial core pattern in the photoresist through exposure and development, so as to complete a lithography process for the sacrificial core pattern;
Step S 022 , etching the organic anti-reflection layer, the nitrogen-free anti-reflection layer and the second amorphous carbon layer by using the photoresist as a mask to form the sacrificial core pattern comprising the second amorphous carbon layer and the nitrogen-free anti-reflection layer on the top of the second amorphous carbon layer;
Step S 023 , depositing a second SiO 2 layer on the sacrificial core pattern;
Step S 024 , anisotropic etching the second SiO 2 layer to expose the nitrogen-free anti-reflection layer of the sacrificial core pattern to form SiO 2 sidewalls of the sacrificial core pattern;
Step S 025 , etching to remove the nitrogen-free anti-reflection layer of the sacrificial core pattern to expose the underlying second amorphous carbon layer;
Step S 026 , anisotropic etching the exposed second amorphous carbon layer while remaining the SiO 2 sidewalls;
Step S 027 , etching the second SiN layer, the first amorphous carbon layer and the first SiN layer by using the SiO 2 sidewalls as a mask to form hard mask lines consist of SiN at bottom and amorphous carbon on the SiN.

2. The line-end cutting method according to claim 1 , wherein the step S 05 further comprises balancing the etching rate of the multiple layers through regulating etching parameters so as to make the bottom of the line-end cuts flat.

3. The line-end cutting method according to claim 1 , wherein the step S 04 comprises spin coating a carbon-contained planarized mask layer, an anti-reflection layer and photoresist successively; the SiN hard mask lines and the substrate are removed by dry etching in the step S 05 ; the coated mask layer is removed by a dry stripping process in the step S 06 .

4. The line-end cutting method according to claim 1 , wherein the etching process in the step S 022 is dry etching, the etching process in the step S 025 is dry etching, the anisotropic etching process in the step S 026 is anisotropic plasma dry etching, the etching process in the step S 027 is anisotropic plasma dry etching.

5. A line-end cutting method for fin structures of FinFETs formed by double patterning technology comprising:
Step S 01 , providing a substrate of a semiconductor device and depositing multiple layers comprising a SiN layer on the substrate;
Step S 02 , etching the multiple layers on the SiN layer by using a sacrificial-core-patterning process to form sidewalls; using the side walls as a mask and etching the remaining multiple layers comprising the SiN layer to form SiN hard mask lines;
Step S 03 , etching the substrate by using the SiN hard mask lines as a mask to form fin structures having silicon trenches therebetween;
Step S 04 , coating a mask layer and photoresist on the fin structures and patterning the photoresist to form a line-end cut pattern in the photoresist;
Step S 05 , using the patterned photoresist in the step S 04 as a mask and etching to remove the SiN hard mask lines and the substrate at regions need to be cut, so as to form line-end cuts having flat bottom surface;
Step S 06 , removing the coated mask layer in the step S 04 to obtain the fin structures with line-end cuts;
wherein the multiple layers comprise a first SiO 2 layer, a first SiN layer, a first amorphous carbon layer, a second SiN layer, a second amorphous carbon layer and a nitrogen-free anti-reflection layer deposited successively on the substrate from bottom to top;
wherein the step S 02 comprises:
Step S 021 ′, depositing an organic anti-reflection layer on the nitrogen-free anti-reflection layer and coating photoresist on the organic anti-reflection layer; performing a lithography process for sacrificial core pattern through exposure and development;
Step S 022 ′, etching the organic anti-reflection layer, the nitrogen-free anti-reflection layer and part of the second amorphous carbon layer by using the photoresist as a mask to form the sacrificial core pattern comprising the second amorphous carbon layer and the nitrogen-free anti-reflection layer on the top of the second amorphous carbon layer;
Step S 023 ′, depositing a second SiO 2 layer on the sacrificial core pattern;
Step S 024 ′, anisotropic etching the second SiO 2 layer to expose the nitrogen-free anti-reflection layer of the sacrificial core pattern to form SiO 2 sidewalls of the sacrificial core pattern;
Step S 025 ′, etching to remove the nitrogen-free anti-reflection layer of the sacrificial core pattern to expose the underlying second amorphous carbon layer;
Step S 026 ′, anisotropic etching the exposed second amorphous carbon layer to form first hard mask lines consist of the SiO 2 sidewalls and the remaining second amorphous carbon layer;
Step S 027 ′, etching the second SiN layer, the first amorphous carbon layer and the first SiN layer by using the first hard mask lines as a mask to form second hard mask lines consist of SiN at bottom and amorphous carbon on the SiN.

6. The line-end cutting method according to claim 5 , wherein the step S 05 further comprises balancing the etching rate of the multiple layers through regulating etching parameters so as to make the bottom of the line-end cuts flat.

7. The line-end cutting method according to claim 5 , wherein the step S 04 comprises spin coating a carbon-contained planarized mask layer, an anti-reflection layer and photoresist successively; the SiN hard mask lines and the substrate are removed by dry etching in the step S 05 ; the coated mask layer is removed by a dry stripping process in the step S 06 .

8. The line-end cutting method according to claim 5 , wherein after the etching process in the step S 022 ′, ¼ to ½ the thickness of the second amorphous carbon layer at two sides of the sacrificial core pattern is remained.

9. The line-end cutting method according to claim 5 , wherein the etching process in the step S 022 ′ is dry etching, the etching process in the step S 025 ′ is dry etching, the anisotropic etching process in the step S 026 ′ is anisotropic plas

Assignees

• Shanghai Ic R & D Center Co Ltd
• Shanghai Ic R&D Ct Co Ltd

Inventors

• Yi Chunyan
• Li Ming

Classifications

• H10P76/2043

  using an anti-reflective coating · CPC title

• H10P50/695

  characterised by the process involved to create the mask, e.g. lift-off masks or sidewalls or to modify the mask · CPC title

• H10P50/287

  by chemical means · CPC title

• H10P50/283

  by chemical means · CPC title

• H10D30/024 Primary

  of fin field-effect transistors [FinFET] · CPC title