Semiconductor device and method for manufacturing the same

US9530892B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9530892-B2
Application numberUS-201314062481-A
CountryUS
Kind codeB2
Filing dateOct 24, 2013
Priority dateOct 24, 2012
Publication dateDec 27, 2016
Grant dateDec 27, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, the oxide insulating film contains more oxygen than that in the stoichiometric composition, and in the transistor, by a bias-temperature stress test, threshold voltage does not change or the amount of the change in a positive direction or a negative direction is less than or equal to 1.0 V, preferably less than or equal to 0.5 V.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor device comprising: a transistor including: an oxide semiconductor film containing In and Ga; and an oxide film containing In or Ga adjacent to the oxide semiconductor film; and a silicon oxide insulating film over the transistor, wherein the silicon oxide insulating film contains oxygen at a higher proportion than a stoichiometric composition, wherein a proportion of Ga in the oxide film containing In or Ga is higher than a proportion of Ga in the oxide semiconductor film, and wherein change in a threshold voltage of the transistor by a bias-temperature stress test each in dark and photostress is within a range of more than or equal to −1.0 V and less than or equal to 1.0 V. 2. The semiconductor device according to claim 1 , wherein the oxide film containing In or Ga is provided over the oxide semiconductor film. 3. The semiconductor device according to claim 1 , wherein the silicon oxide insulating film is in contact with the oxide film containing In or Ga. 4. The semiconductor device according to claim 1 , further comprising: a pair of electrodes in contact with the oxide film containing In or Ga. 5. A semiconductor device comprising: a transistor including: a gate electrode over a substrate; a gate insulating film covering the gate electrode; a multilayer film overlapping with the gate electrode with the gate insulating film provided between the multilayer film and the gate electrode; and a pair of electrodes in contact with the multilayer film; and a silicon oxide insulating film covering the gate insulating film, the multilayer film, and the pair of electrodes, wherein the multilayer film includes an oxide semiconductor film and an oxide film containing In or Ga, wherein the silicon oxide insulating film contains oxygen at a higher proportion than a stoichiometric composition, and wherein change in a threshold voltage of the transistor by a bias-temperature stress test each in dark and photostress is within a range of more than or equal to −1.0 V and less than or equal to 1.0 V. 6. The semiconductor device according to claim 5 , wherein the oxide semiconductor film contains In or Ga. 7. The semiconductor device according to claim 5 , wherein an energy level of a conduction band bottom of the oxide film containing In or Ga is closer to a vacuum level than an energy level of a conduction band bottom of the oxide semiconductor film. 8. The semiconductor device according to claim 7 , wherein difference between the energy level of the conduction band bottom of the oxide film containing In or Ga and the energy level of the conduction band bottom of the oxide semiconductor film is greater than or equal to 0.05 eV and less than or equal to 2 eV. 9. The semiconductor device according to claim 5 , wherein each of the oxide semiconductor film and the oxide film containing In or Ga is a film containing an In—M—Zn oxide, wherein the M is one selected from the group consisting of Al, Ti, Y, Zr, La, Ce, Nd, and Hf, and wherein proportion of the M in the oxide film containing In or Ga is higher than proportion of the M in the oxide semiconductor film. 10. The semiconductor device according to claim 5 , wherein each of the oxide semiconductor film and the oxide film containing In or Ga is a film containing an In—Ga—Zn oxide, and wherein proportion of the Ga in the oxide film containing In or Ga is higher than proportion of the Ga in the oxide semiconductor film. 11. The semiconductor device according to claim 5 , wherein in the multilayer film, an absorption coefficient derived from a constant photocurrent method is lower than 1×10 −3 /cm in an energy range of 1.5 eV to 2.3 eV. 12. The semiconductor device according to claim 5 , wherein silicon concentration in between the oxide semiconductor film and the oxide film containing In or Ga is lower than 2×10 18 atoms/cm 3 . 13. A method for manufacturing a semiconductor device comprising a transistor, comprising: forming a gate electrode over a substrate, forming a gate insulating film over the substrate; forming a multilayer film over the gate insulating film, the multilayer film including an oxide semiconductor film and an oxide film containing In or Ga, forming a pair of electrodes in contact with the multilayer film, and forming an oxide insulating film over the multilayer film and the pair of electrodes, wherein the oxide insulating film is formed by holding the substrate placed in a treatment chamber which is vacuum-evacuated at a temperature higher than or equal to 180° C. and lower than or equal to 260° C., setting pressure in the treatment chamber to be greater than or equal to 100 Pa and less than or equal to 250 Pa with introduction of a source gas into the treatment chamber, and supplying a frequency power higher than or equal to 0.17 W/cm 2 and lower than or equal to 0.5 W/cm 2 to an electrode provided in the treatment chamber, wherein change in a threshold voltage of the transistor by a bias-temperature stress test each in dark and photostress is within a range of more than or equal to −1.0 V and less than or equal to 1.0 V. 14. The method for manufacturing a semiconductor device according to claim 13 , wherein as the oxide insulating film, a silicon oxide film or a silicon oxynitride film is formed by using a deposition gas containing silicon and an oxidizing gas as source gases. 15. The method for manufacturing a semiconductor device according to claim 13 , wherein as the oxide insulating film, a silicon oxynitride film is formed using silane and dinitrogen monoxide as source gases. 16. The semiconductor device according to claim 5 , wherein the silicon oxide insulating film is in direct contact with a top surface of the oxide film containing In or Ga.

Assignees

Inventors

Classifications

  • being oxide semiconductor materials (Group IIB-VIA semiconductor materials H10P14/3424) · CPC title

  • Oxides · CPC title

  • using physical deposition, e.g. vacuum deposition or sputtering · CPC title

  • Deposition from the gas or vapour phase · CPC title

  • characterised by the type of materials · CPC title

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What does patent US9530892B2 cover?
A semiconductor device includes a transistor including a gate electrode over a substrate, a gate insulating film covering the gate electrode, a multilayer film overlapping with the gate electrode with the gate insulating film provided therebetween, and a pair of electrodes in contact with the multilayer film, and an oxide insulating film covering the transistor. The multilayer film includes an …
Who is the assignee on this patent?
Semiconductor Energy Lab
What technology area does this patent fall under?
Primary CPC classification H10D30/6704. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).