Semiconductor device and method of forming interconnect structure and mounting semiconductor die in recessed encapsulant

Patent metadata

Field	Value
Publication number	US-9530738-B2
Application number	US-201414462347-A
Country	US
Kind code	B2
Filing date	Aug 18, 2014
Priority date	May 14, 2010
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

A semiconductor device has conductive pillars formed over a carrier. A first semiconductor die is mounted over the carrier between the conductive pillars. An encapsulant is deposited over the first semiconductor die and carrier and around the conductive pillars. A recess is formed in a first surface of the encapsulant over the first semiconductor die. The recess has sloped or stepped sides. A first interconnect structure is formed over the first surface of the encapsulant. The first interconnect structure follows a contour of the recess in the encapsulant. The carrier is removed. A second interconnect structure is formed over a second surface of the encapsulant and first semiconductor die. The first and second interconnect structures are electrically connected to the conductive pillars. A second semiconductor die is mounted in the recess. A third semiconductor die is mounted over the recess and second semiconductor die.

First claim

What is claimed:

1. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first semiconductor die over the substrate;
disposing a first interconnect structure over the substrate adjacent to the first semiconductor die;
depositing an encapsulant over the substrate and around the first semiconductor die and first interconnect structure; and
forming a second interconnect structure to electrically couple the first interconnect structure and the first semiconductor die after depositing the encapsulant.

2. The method of claim 1 , further including depositing the encapsulant over the first semiconductor die with the first interconnect structure extending through the encapsulant.

3. The method of claim 1 , further including disposing a second semiconductor die over the first semiconductor die with the second semiconductor die electrically connected to the first interconnect structure.

4. The method of claim 1 , wherein providing the first semiconductor die includes providing an electrical component and a mechanical component.

5. The method of claim 1 , wherein providing the first interconnect structure includes providing a conductive pillar or conductive via.

6. The method of claim 1 , further including:
removing the substrate to expose a first surface of the first semiconductor die; and
forming the second interconnect structure over the first interconnect structure and first surface of the first semiconductor die.

7. A method of making a semiconductor device, comprising:
providing a first semiconductor die;
providing a first interconnect structure; and
depositing an encapsulant over the first semiconductor die and first interconnect structure with the first interconnect structure extending through the encapsulant and with the first interconnect structure electrically isolated from the first semiconductor die.

8. The method of claim 7 , further including forming a first conductive layer over the first interconnect structure.

9. The method of claim 8 , further including forming a second conductive layer electrically connected to the first conductive layer through the first interconnect structure.

10. The method of claim 7 , further including forming a second interconnect structure over the first semiconductor die, encapsulant, and first interconnect structure.

11. The method of claim 7 , further including disposing a second semiconductor die over the first semiconductor die and electrically connected to the first interconnect structure.

12. The method of claim 7 , wherein providing the first semiconductor die includes providing an electrical component and a mechanical component.

13. The method of claim 7 , wherein providing the first interconnect structure includes providing a conductive pillar or conductive via.

14. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first semiconductor die on the substrate;
disposing a first interconnect structure on the substrate;
depositing an encapsulant over the first semiconductor die and first interconnect structure;
removing the substrate to expose an active surface of the first semiconductor die after depositing the encapsulant; and
forming a build-up interconnect structure over the active surface of the first semiconductor die, the encapsulant, and the first interconnect structure after removing the substrate.

15. The method of claim 14 , further including depositing the encapsulant with the first interconnect structure extending through the encapsulant.

16. The method of claim 14 , further including disposing a second semiconductor die over the first semiconductor die with the second semiconductor die electrically connected to the build-up interconnect structure through the first interconnect structure.

17. The method of claim 14 , wherein providing the first semiconductor die includes providing an electrical component and a mechanical component.

18. The method of claim 14 , wherein providing the first interconnect structure includes providing a conductive pillar or conductive via.

19. The method of claim 14 , further including forming a conductive layer over the first interconnect structure opposite the build-up interconnect structure.

20. A method of making a semiconductor device, comprising:
providing a substrate;
disposing a first semiconductor die on the substrate;
disposing a first interconnect structure on the substrate; and
depositing an encapsulant over the first semiconductor die with the first interconnect structure extending from a top surface of the encapsulant to a bottom surface of the encapsulant.

21. The method of claim 20 , further including forming a first conductive layer over the first interconnect structure.

22. The method of claim 21 , further including forming a second conductive layer electrically connected to the first conductive layer through the first interconnect structure.

23. The method of claim 20 , further including forming a second interconnect structure over the first semiconductor die, encapsulant, and first interconnect structure.

24. The method of claim 20 , further including disposing a second semiconductor die over the first semiconductor die and electrically connected to the first interconnect structure.

25. The method of claim 20 , wherein providing the first interconnect structure includes providing a conductive pillar or conductive via.

Assignees

• Stats Chippac Ltd
• Stats Chippac Pte Ltd

Inventors

• Chua Linda Pei Ee
• Do Byung Tai
• Pagaila Reza A

Classifications

• H10P54/00

  Cutting or separating of wafers, substrates or parts of devices · CPC title

• H10P14/46

  using a liquid · CPC title

• H10W90/754

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title

• H10W90/732

  between stacked chips · CPC title

• H10W90/724

  between a chip and a stacked insulating package substrate, interposer or RDL · CPC title