Transmission line characterization using EM calibration
US-9147020-B2 · Sep 29, 2015 · US
4 port L-2L de-embedding method
US9530705B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9530705-B2 |
| Application number | US-201313864376-A |
| Country | US |
| Kind code | B2 |
| Filing date | Apr 17, 2013 |
| Priority date | Mar 14, 2013 |
| Publication date | Dec 27, 2016 |
| Grant date | Dec 27, 2016 |
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Abstract
Official abstract text for this publication.
Some embodiments relate to a wafer. The wafer includes a first dummy component comprising two or more first dummy component transmission lines. One of the first dummy component transmission lines operably couples a first signal test pad to a second signal test pad, and an other of the first dummy component transmission lines operably couples a third signal test pad to a fourth signal test pad. A second dummy component comprises two or more second dummy component transmission lines. One of the second dummy component transmission lines operably couples a fifth signal test pad to a sixth signal test pad, and an other of the second dummy component transmission lines operably couples a seventh signal test pad to an eighth signal test pad. Other embodiments are also disclosed.
First claim
Opening claim text (preview).
What is claimed is: 1. A wafer including at least one die that comprises a plurality of devices and at least one four-port test structure for de-embedding at least one of the devices which is referred to as a device under test (DUT), wherein the four port test structure on the wafer comprises: a first dummy component comprising two or more first dummy component transmission lines and two or more power lines, wherein one of the first dummy component transmission lines operably coup…
Assignees
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Classifications
Electricity · mapped topic
- H10P74/27Primary
Electricity · mapped topic
Physics · mapped topic
- G01R31/2607Primary
Physics · mapped topic
- H01L22/30Primary
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9530705B2 cover?
- Some embodiments relate to a wafer. The wafer includes a first dummy component comprising two or more first dummy component transmission lines. One of the first dummy component transmission lines operably couples a first signal test pad to a second signal test pad, and an other of the first dummy component transmission lines operably couples a third signal test pad to a fourth signal test pad. …
- Who is the assignee on this patent?
- Taiwan Semiconductor Mfg Co Ltd, Taiwan Semiconductor Mfg Co Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10P74/27. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 27 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 2 related publications on this page (citations in our corpus or others sharing the same primary CPC).