Method, apparatus and system to manage implicit pre-charge command signaling

Patent metadata

Field	Value
Publication number	US-9530468-B2
Application number	US-201414498509-A
Country	US
Kind code	B2
Filing date	Sep 26, 2014
Priority date	Sep 26, 2014
Publication date	Dec 27, 2016
Grant date	Dec 27, 2016

Abstract

Techniques and mechanisms for exchanging information between a memory controller and a memory device. In an embodiment, a memory controller receives information indicating for a memory device a threshold number of pending consolidated activation commands to access that memory device. The threshold number indicated by the information is less than a theoretical maximum number of pending consolidated activation commands, the theoretical maximum number defined based on timing parameters of the memory device. In another embodiment, the memory controller limits communication of consolidated activation commands to the memory device based on the information indicating the threshold number.

First claim

What is claimed is:

1. A memory device comprising:
one or more arrays of memory cells;
an input/output interface to detect connectivity of the memory device to a memory controller; and
threshold identification logic to send to the memory controller information indicating a threshold number of pending consolidated activation commands to access the one or more arrays of memory cells, wherein a consolidated activation command indicates a precharge command, wherein the threshold number is less than a theoretical maximum number of pending consolidated activation commands, wherein the theoretical maximum number is based on timing parameters of the memory device, and wherein the memory controller limits communication of consolidated activation commands to the memory device based on the information indicating the threshold number.

2. The memory device of claim 1 , wherein the theoretical maximum number is based on:
a timing parameter tRP representing a minimum time necessary to perform a memory precharge operation; and
a timing parameter tRRD representing a minimum time necessary between successive activation operations.

3. The memory device of claim 2 , wherein the theoretical maximum number is equal to a sum of one and an integer equal to a floor function value based on a ratio of tRRD to tRP.

4. The memory device of claim 1 , wherein the threshold number is greater than one.

5. The memory device of claim 1 , wherein the information indicating the threshold number of pending consolidated activation commands includes the threshold number of pending consolidated activation commands.

6. The memory device of claim 1 , wherein the information indicating the threshold number of pending consolidated activation commands includes a product identifier number, wherein the memory controller accesses reference data based on the product identification number to determine the threshold number of pending consolidated activation commands.

7. A memory controller comprising:
an input/output interface to couple the memory controller to a memory device;
mode selection circuitry to receive information indicating a threshold number of pending consolidated activation commands to access the memory device, wherein a consolidated activation command indicates a precharge command, wherein the threshold number is less than a theoretical maximum number of pending consolidated activation commands, wherein the theoretical maximum number is based on timing parameters of the memory device; and
command logic to communicate consolidated activation commands to the memory device, wherein the mode selection logic to limit communication of consolidated activation commands to the memory device based on the information indicating the threshold number.

8. The memory controller of claim 7 , wherein the theoretical maximum number is based on:
a timing parameter tRP representing a minimum time necessary to perform a memory precharge operation; and
a timing parameter tRRD representing a minimum time necessary between successive activation operations.

9. The memory controller of claim 8 , wherein the theoretical maximum number is equal to a sum of one and an integer equal to a floor function value based on a ratio of tRRD to tRP.

10. The memory controller of claim 7 , wherein the threshold number is greater than one.

11. The memory controller of claim 7 , wherein the information indicating the threshold number of pending consolidated activation commands includes a product identifier number, wherein the memory controller accesses reference data based on the product identification number to determine the threshold number of pending consolidated activation commands.

12. A method at a memory device, the method comprising:
detecting connectivity of the memory device to a memory controller; and
in response to detecting the connectivity, sending to the memory controller information indicating a threshold number of pending consolidated activation commands to access the memory device, wherein a consolidated activation command indicates a precharge command, wherein the threshold number is less than a theoretical maximum number of pending consolidated activation commands, the theoretical maximum number based on timing parameters of the memory device, wherein the memory controller limits communication of consolidated activation commands to the memory device based on the information indicating the threshold number.

13. The method of claim 12 , wherein the theoretical maximum number is based on:
a timing parameter tRP representing a minimum time necessary to perform a memory precharge operation; and
a timing parameter tRRD representing a minimum time necessary between successive activation operations.

14. The method of claim 13 , wherein the theoretical maximum number is equal to a sum of one and an integer equal to a floor function value based on a ratio of tRRD to tRP.

15. The method of claim 12 , wherein the information indicating the threshold number of pending consolidated activation commands includes a product identifier number, wherein the memory controller accesses reference data based on the product identification number to determine the threshold number of pending consolidated activation commands.

16. A method at a memory controller, the method comprising:
receiving information indicating a threshold number of pending consolidated activation commands to access a memory device coupled to the memory controller, wherein a consolidated activation command indicates a precharge command, wherein the threshold number is less than a theoretical maximum number of pending consolidated activation commands, wherein the theoretical maximum number is based on timing parameters of the memory device; and
limiting a communication of consolidated activation commands to the memory device based on the information indicating the threshold number.

17. The method of claim 16 , wherein the theoretical maximum number is based on:
a timing parameter tRP representing a minimum time necessary to perform a memory precharge operation; and
a timing parameter tRRD representing a minimum time necessary between successive activation operations.

18. The method of claim 17 , wherein the theoretical maximum number is equal to a sum of one and an integer equal to a floor function value based on a ratio of tRRD to tRP.

19. The method of claim 16 , wherein the information indicating the threshold number of pending consolidated activation commands includes a product identifier number, wherein the memory controller accesses reference data based on the product identification number to determine the threshold number of pending consolidated activation commands.

20. A system comprising:
a memory controller;
a memory device including:
one or more arrays of memory cells;
an input/output interface coupled to the memory controller; and
threshold identification logic to send to the memory controller information indicating a threshold number of pending consolidated activation commands to access the one or more arrays of memory cells, wherein a consolidated activation command indicates a precharge command, wherein the threshold number is less than a theoretical maximum number of pending consolidated activation commands, wherein the theoretical maximum number is based on timing parameters of the memory device, and wherein the memory controller limits communication of consolidated activation commands to the memory device based on the information indicating the threshold number; and

a display coupled to th

Assignees

• Halbert John B
• Christenson Bruce A
• Bains Kuljit S
• Intel Corp

Inventors

• Halbert John B
• Christenson Bruce A
• Bains Kuljit S

Classifications

• G11C11/4093

  Input/output [I/O] data interface arrangements, e.g. data buffers · CPC title

• G11C7/109

  Control signal input circuits · CPC title

• G06F13/1689

  Synchronisation and timing concerns (synchronisation on a memory bus G06F13/4234) · CPC title

• G11C11/4076 Primary

  Timing circuits (for regeneration management G11C11/406) · CPC title

• G11C7/1045

  Read-write mode select circuits · CPC title