Dyketopyrrolopyrrole polymers for use in organic semiconductor devices
US-9221943-B2 · Dec 29, 2015 · US
Fringing field assisted dielectrophoresis assembly of carbon nanotubes
US9525147B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9525147-B2 |
| Application number | US-201514615554-A |
| Country | US |
| Kind code | B2 |
| Filing date | Feb 6, 2015 |
| Priority date | Sep 25, 2014 |
| Publication date | Dec 20, 2016 |
| Grant date | Dec 20, 2016 |
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Abstract
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A method of arranging at least one carbon nanotube on a semiconductor substrate includes depositing the at least one carbon nanotube on a dielectric layer of the semiconductor device. The method further includes arranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and applying a ground potential to an electrically conductive semiconductor layer of the semiconductor device.
First claim
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What is claimed is: 1. A method of arranging at least one carbon nanotube on a semiconductor device, the method comprising: depositing a solution containing a plurality of single-walled nanotubes on a dielectric layer and on a portion of the conductive electrode covered by a dielectric film; and arranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and applying a ground potential to an electrically conductive semiconductor layer of the semiconductor device. 2. The method of claim 1 , wherein the applying a voltage potential includes using only a single contiguous metal electrode to receive the voltage potential. 3. The method of claim 1 , wherein the arranging the at least one carbon nanotube includes self-aligning the single-walled nanotubes in monolayer aligned arrays. 4. The method of claim 3 , further comprising self-aligning the single-walled nanotubes according to a uniform pitch. 5. The method of claim 4 , wherein the self-aligning the single-walled nanotubes further comprises defining an average pitch ranging from about 20 nanometers with respect to each single-walled nanotube. 6. The method of claim 5 , further comprising arranging the single-walled nanotubes between a source contact and a drain contact formed on the dielectric film such that the single-walled nanotubes define gate channels between the source contact and the drain contact.
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Classifications
- H01L51/0545Primary
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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- What does patent US9525147B2 cover?
- A method of arranging at least one carbon nanotube on a semiconductor substrate includes depositing the at least one carbon nanotube on a dielectric layer of the semiconductor device. The method further includes arranging the at least one carbon nanotube on the dielectric layer in response to applying a voltage potential to an electrically conductive electrode of the semiconductor device, and a…
- Who is the assignee on this patent?
- IBM
- What technology area does this patent fall under?
- Primary CPC classification H01L51/0545. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).