Solar cell emitter region fabrication with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer

US9525083B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9525083-B2
Application numberUS-201514671781-A
CountryUS
Kind codeB2
Filing dateMar 27, 2015
Priority dateMar 27, 2015
Publication dateDec 20, 2016
Grant dateDec 20, 2016

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Abstract

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Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type emitter region is disposed in a trench formed in the back surface of the substrate. An N-type passivation layer is disposed on the N-type emitter region. A first conductive contact structure is electrically connected to the P-type emitter region. A second conductive contact structure is electrically connected to the N-type emitter region and is in direct contact with the N-type passivation layer.

First claim

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What is claimed is: 1. A solar cell, comprising: a substrate having a light-receiving surface and a back surface; a P-type emitter region disposed on the back surface of the substrate; an N-type emitter region disposed in a trench formed in the back surface of the substrate; an N-type passivation layer disposed on the N-type emitter region; a first conductive contact structure electrically connected to the P-type emitter region; and a second conductive contact structure electrically connected to the N-type emitter region and in direct contact with the N-type passivation layer. 2. The solar cell of claim 1 , wherein the N-type passivation layer is an N-type amorphous silicon layer. 3. The solar cell of claim 2 , wherein a total composition of the N-type amorphous silicon layer has a total hydrogen concentration approximately in the range of 5-20% of total film composition. 4. The solar cell of claim 2 , wherein a total composition of the N-type amorphous silicon layer has a total phosphorous dopant concentration approximately in the range of 1E19-5E20 atoms/cm 3 . 5. The solar cell of claim 1 , wherein the N-type passivation layer has a thickness approximately in the range of 5-50 nanometers. 6. A back contact solar cell, comprising: a substrate having a light-receiving surface and a back surface; a P-type polycrystalline silicon emitter region disposed on a first thin dielectric layer disposed on the back surface of the substrate; an N-type polycrystalline silicon emitter region disposed on a second thin dielectric layer disposed in a trench formed in the back surface of the substrate; a third thin dielectric layer disposed laterally directly between the N-type and P-type polycrystalline silicon emitter regions; an N-type silicon layer disposed on the N-type polycrystalline silicon emitter region; a first conductive contact structure electrically connected to the P-type polycrystalline silicon emitter region; and a second conductive contact structure electrically connected to the N-type polycrystalline silicon emitter region and in direct contact with the N-type silicon layer. 7. The back contact solar cell of claim 6 , wherein the N-type silicon layer is further disposed over, but not in contact with, the P-type polycrystalline silicon emitter region. 8. The back contact solar cell of claim 6 , wherein the N-type silicon layer is an N-type amorphous silicon layer. 9. The back contact solar cell of claim 8 , wherein a total composition of the N-type amorphous silicon layer has a total hydrogen concentration approximately in the range of 5-20% of total film composition. 10. The back contact solar cell of claim 8 , wherein a total composition of the N-type amorphous silicon layer has a total phosphorous dopant concentration approximately in the range of 1E19-5E20 atoms/cm 3 . 11. The back contact solar cell of claim 6 , wherein the N-type silicon layer has a thickness approximately in the range of 5-50 nanometers. 12. The back contact solar cell of claim 11 , wherein the N-type polycrystalline silicon emitter region has a thickness of approximately 30 nanometers, and the N-type silicon layer has a thickness of approximately 20 nanometers. 13. The back contact solar cell of claim 6 , further comprising: an insulator layer disposed on the P-type polycrystalline silicon emitter region, wherein the first conductive contact structure is disposed through the insulator layer, and wherein a portion of the N-type polycrystalline silicon emitter region and a portion of the N-type silicon layer overlap the insulator layer. 14. The back contact solar cell of claim 6 , wherein the trench has a texturized surface. 15. The back contact solar cell of claim 6 , further comprising: a fourth thin dielectric layer disposed on the light-receiving surface of the substrate; a polycrystalline silicon layer disposed on the fourth thin dielectric layer; and an anti-reflective coating (ARC) layer disposed on the polycrystalline silicon layer. 16. The back contact solar cell of claim 6 , wherein the substrate is an N-type monocrystalline silicon substrate, and wherein all of the first, second and third thin dielectric layers comprise silicon dioxide. 17. A method of fabricating alternating N-type and P-type emitter regions of a solar cell, the method comprising: forming a P-type silicon layer on a first thin dielectric layer formed on a back surface of a substrate; forming an insulating layer on the P-type silicon layer; patterning the insulating layer and the P-type silicon layer to form P-type silicon regions having an insulating cap thereon; forming a second thin dielectric layer on exposed sides of the P-type silicon regions; forming an N-type silicon layer on a third thin dielectric layer formed on the back surface of the substrate, and on the second thin dielectric layer and the insulating cap of the P-type silicon regions; forming an N-type amorphous silicon layer on the N-type silicon layer; patterning the N-type amorphous silicon layer and the N-type silicon layer to form isolated N-type emitter regions and to form contact openings in regions of the N-type amorphous silicon layer and the N-type silicon layer above the insulating cap of the P-type silicon regions; patterning the insulating cap through the contact openings to expose portions of the P-type silicon regions; forming conductive contacts to the P-type silicon regions and to the N-type emitter regions, the conductive contacts to the P-type silicon regions formed in the contact openings, and the conductive contacts to the N-type emitter regions formed in direct contact with the N-type amorphous silicon layer of the N-type emitter regions. 18. The method of claim 17 , wherein forming the N-type amorphous silicon layer comprises depositing N-type amorphous silicon by plasma-enhanced chemical vapor deposition (PECVD) at a temperature below approximately 400 degrees Celsius. 19. The method of claim 18 , wherein forming the N-type amorphous silicon layer comprises forming an N-type amorphous silicon layer having a total hydrogen concentration approximately in the range of 5-20% of total film composition, and having a total phosphorous dopant concentration approximately in the range of 1E19-5E20 atoms/cm3, and to a thickness approximately in the range of 5-50 nanometers. 20. A solar cell fabricated according to the method of claim 17 .

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What does patent US9525083B2 cover?
Methods of fabricating solar cell emitter regions with differentiated P-type and N-type architectures and incorporating a multi-purpose passivation and contact layer, and resulting solar cells, are described. In an example, a solar cell includes a substrate having a light-receiving surface and a back surface. A P-type emitter region is disposed on the back surface of the substrate. An N-type em…
Who is the assignee on this patent?
Westerberg Staffan, Rim Seung Bum, Sunpower Corp
What technology area does this patent fall under?
Primary CPC classification H01L31/022441. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 12 related publications on this page (citations in our corpus or others sharing the same primary CPC).