Method of forming an epitaxial semiconductor layer in a recess and a semiconductor device having the same

Patent metadata

Field	Value
Publication number	US-9525026-B2
Application number	US-201514942167-A
Country	US
Kind code	B2
Filing date	Nov 16, 2015
Priority date	Apr 30, 2014
Publication date	Dec 20, 2016
Grant date	Dec 20, 2016

Abstract

A method of manufacturing a semiconductor device may include: etching a recess in a semiconductor substrate, where the etching produces a metal residue over a surface of the recess. The recess may thereafter be exposed to a cleaning process that causes the metal residue to etch at least one fissure in the semiconductor substrate. The at least one fissure may extend from the surface of the recess into the semiconductor substrate. The method may further include epitaxially forming a liner comprising a first semiconductor material having a first dopant concentration within the recess and over the at least one fissure. The method proceeds with epitaxially forming a semiconductor layer comprising a second semiconductor material having a second dopant concentration over the liner.

First claim

What is claimed is:

1. A method, comprising:
etching a recess in a semiconductor substrate, the etching producing a metal residue over a surface of the recess;
exposing the recess to a cleaning process, the cleaning process causing the metal residue to etch at least one fissure in the semiconductor substrate, the at least one fissure extending from the surface of the recess into the semiconductor substrate;
epitaxially forming a liner comprising a first semiconductor material having a first dopant concentration within the recess and over the at least one fissure; and
epitaxially forming a semiconductor layer comprising a second semiconductor material having a second dopant concentration over the liner.

2. The method of claim 1 , wherein the first dopant concentration is lower than the second dopant concentration.

3. The method of claim 1 , wherein the metal residue comprises at least one of iron, chromium, gold, platinum, silver, or aluminum.

4. The method of claim 1 , wherein the first semiconductor material has a conductivity type different from a conductivity type of the semiconductor substrate.

5. The method of claim 1 , wherein epitaxially forming the liner comprises using a first epitaxial process performed at a temperature in a range from about 550 degrees Celsius to about 800 degrees Celsius.

6. The method of claim 1 , wherein epitaxially forming the semiconductor layer comprises using a second epitaxial process performed at a temperature in a range from about 550 degrees Celsius to about 750 degrees Celsius.

7. The method of claim 1 , wherein the cleaning process comprises exposing the recess to an etchant.

8. The method of claim 7 , wherein the etchant comprises at least one of dilute hydrofluoric acid, potassium hydroxide, or tetra-methyl ammonium hydroxide.

9. The method of claim 1 , wherein the cleaning process comprises exposing the recess to an oxidizing agent.

10. The method of claim 9 , wherein the oxidizing agent comprises at least one of hydrogen peroxide, water, or oxygen.

11. A method, comprising:
lining a recess with a first semiconductor material, the first semiconductor material covering at least one fissure extending from a surface of the recess into a semiconductor substrate; and
filling the recess with a second semiconductor material, the second semiconductor material disposed over the first semiconductor material, wherein a dopant concentration of the second semiconductor material is greater than a dopant concentration of the first semiconductor material.

12. The method of claim 11 , wherein the dopant concentration of the second semiconductor material is greater than about 4×10 20 atoms per cubic centimeter.

13. The method of claim 11 , wherein lining the recess with the first semiconductor material comprises a selective epitaxial growth process, wherein a selectivity of the selective epitaxial growth process is controlled by a partial pressure of an etchant gas used in the selective epitaxial growth process.

14. The method of claim 11 , wherein filling the recess with the second semiconductor material comprises at least one of a cyclic deposition etch process or a selective epitaxial growth process.

15. A semiconductor device, comprising:
a recess extending into a semiconductor substrate, the recess having at least one fissure extending from a surface of the recess into the semiconductor substrate;
a liner disposed within the recess, the liner comprising a doped first semiconductor material and conforming to a shape of the recess; and
a semiconductor layer comprising a doped second semiconductor material disposed within the recess and over the liner.

16. The semiconductor device of claim 15 , wherein the doped first semiconductor material has a graded doping profile.

17. The semiconductor device of claim 15 , wherein a thickness of the doped first semiconductor material is in a range from about 1 nanometer to about 5 nanometers.

18. The semiconductor device of claim 15 , wherein a thickness of the doped second semiconductor material is in a range from about 15 nanometers to about 60 nanometers.

19. The semiconductor device of claim 15 , wherein a concentration of dopant atoms in the doped second semiconductor material is greater than about 4×10 20 atoms per cubic centimeter.

20. The semiconductor device of claim 15 , wherein a concentration of dopant atoms in the doped first semiconductor material is less than about 4×10 20 atoms per cubic centimeter.

Assignees

• Taiwan Semiconductor Mfg Co Ltd

Inventors

• Tsai Chun Hsiung
• Kwok Tsz-Mei

Classifications

• H10P14/3444

  P-type · CPC title

• H10P14/3442

  N-type · CPC title

• H10P14/3411

  Silicon, silicon germanium or germanium · CPC title

• H10P14/3254

  Graded layers · CPC title

• H10P14/2925 Primary

  Surface structures · CPC title