Semiconductor assembly comprising chip arrays

US9524951B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9524951-B2
Application numberUS-201514669208-A
CountryUS
Kind codeB2
Filing dateMar 26, 2015
Priority dateApr 3, 2014
Publication dateDec 20, 2016
Grant dateDec 20, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A semiconductor assembly includes a frame having at least one opening, an identical number of electrically conductive first contact plates, and an identical number of chip arrays. Each chip array has a number of semiconductor chips that are cohesively connected to one another by an embedding compound. In addition, each of the semiconductor chips has a first load terminal and a second load terminal arranged at mutually opposite sides of the relevant semiconductor chip. One of the chip arrays is inserted into each of the openings. Each of the first contact plates is arranged above one of the chip arrays in such a way that, for each of the semiconductor chips, the first load terminal is situated at a side of said semiconductor chip facing the first contact plate and the second load terminal is situated a of said semiconductor chip facing away from the first contact plate.

First claim

Opening claim text (preview).

What is claimed is: 1. A semiconductor assembly, comprising: a frame having a number N55≧1 of openings; a number N55 of electrically conductive first contact plates; and a number N55 of chip arrays, each of which has a number N10≧2 of that are cohesively connected to one another by an embedding compound to form a fixed assemblage; wherein each of the semiconductor chips has a first load terminal and a second load terminal, which are arranged at mutually opposite sides of the relevant semiconductor chip; one of the chip arrays is inserted into each of the openings; each of the first contact plates is arranged above one of the chip arrays in such a way that, in the case of each of the semiconductor chips of said chip array, and wherein the first load terminal is situated at that side of said semiconductor chip which faces the first contact plate and the second load terminal is situated at that side of said semiconductor chip which faces away from the first contact plate. 2. The semiconductor assembly as claimed in claim 1 , wherein each of the first contact plates is fixed to the frame movably by means of a first connection. 3. The semiconductor assembly as claimed in claim 2 , wherein, in the case of each of the first contact plates, the relevant first connection is embodied as a closed ring, which completely seals a gap formed between said first contact plate and the frame. 4. The semiconductor assembly as claimed in claim 2 , wherein each of the first connections is formed by a silicone adhesive or a metal spring. 5. The semiconductor assembly as claimed in claim 1 , comprising exactly one electrically conductive second contact plate, which is arranged below all of the chip arrays in such a way that, in the case of each of the semiconductor chips of the chip arrays, the second load terminal is situated at that side of said semiconductor chip which faces the second contact plate and the first load terminal is situated at that side of said semiconductor chip which faces away from the second contact plate. 6. The semiconductor assembly as claimed in claim 1 , comprising a number N55 of second contact plates, each of which is arranged below one of the chip arrays in such a way that, in the case of each of the semiconductor chips of said chip array, the second load terminal is situated at that side of said semiconductor chip which faces the second contact plate and the first load terminal is situated at that side of said semiconductor chip which faces away from the second contact plate. 7. The semiconductor assembly as claimed in claim 6 , wherein each second contact plate is fixed to the frame movably by means of a second connection. 8. The semiconductor assembly as claimed in claim 7 , wherein, in the case of each of the second contact plates, the relevant second connection is embodied as a closed ring, which completely seals a gap formed between said second contact plate and the frame. 9. The semiconductor assembly as claimed in claim 7 , wherein each second connection is formed by a silicone adhesive or a metal spring. 10. The semiconductor assembly as claimed in claim 1 , wherein each of the chip arrays is fixed to the frame movably by means of a third connection. 11. The semiconductor assembly as claimed in claim 10 , wherein, in the case of each of the chip arrays, the relevant third connection is embodied as a closed ring, which completely seals a gap formed between said chip array and the frame. 12. The semiconductor assembly as claimed in claim 10 , wherein each third connection is formed by a silicone adhesive. 13. The semiconductor assembly as claimed in claim 1 , wherein the embedding compound of each of the chip arrays comprises plastic or consists of plastic. 14. A pressure contact arrangement comprising: a semiconductor assembly as claimed in claim 1 ; a first pressure piece; and a second pressure piece; wherein the semiconductor assembly is clamped in between the first pressure piece and the second pressure piece in such a way that there is an electrically conductive pressure contact between the first pressure piece and each of the first contact plates; and there is an electrically conductive pressure contact between the second pressure piece and each of the second contact plates. 15. The semiconductor assembly as claimed in claim 1 , wherein the frame is a planar dielectric structure with N55≧2 openings, wherein each of the openings has a shape that is complementary to the a shape of the one of the chip arrays.

Assignees

Inventors

Classifications

  • having another interconnection being formed by a cover plate parallel to the conductive base, e.g. sandwich type · CPC title

  • Seals · CPC title

  • characterised by their shape · CPC title

  • characterised by arrangements for sealing or adhesion · CPC title

  • batch processes · CPC title

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Frequently asked questions

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What does patent US9524951B2 cover?
A semiconductor assembly includes a frame having at least one opening, an identical number of electrically conductive first contact plates, and an identical number of chip arrays. Each chip array has a number of semiconductor chips that are cohesively connected to one another by an embedding compound. In addition, each of the semiconductor chips has a first load terminal and a second load termi…
Who is the assignee on this patent?
Infineon Technologies Ag
What technology area does this patent fall under?
Primary CPC classification H10W72/00. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).