Silicon-on-insulator microchannels for biological sensors

US9524900B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9524900-B2
Application numberUS-201414186839-A
CountryUS
Kind codeB2
Filing dateFeb 21, 2014
Priority dateMar 7, 2013
Publication dateDec 20, 2016
Grant dateDec 20, 2016

How to read this patent

A practical reading order for non-experts. Skip the full description unless you need deep technical detail.

  1. Title

    What the patent document calls the invention.

  2. Abstract

    A short plain-language summary of the technical disclosure.

  3. Assignees and inventors

    Who owns or filed the patent and who is credited as inventor.

  4. Key dates

    Filing, priority, publication, and grant dates set the timeline.

  5. First independent claim

    The legal scope of protection — read this for what is actually claimed.

  6. CPC / IPC classifications

    Technology tags used to group this patent with similar filings.

  7. Citations and related patents

    Prior art links and similar publications in this corpus.

Abstract

Official abstract text for this publication.

Novel methods to fabricate biological sensors and electronics are disclosed. A silicon-on-insulator wafer can be employed by etching a pattern of holes in the silicon layer, then a pattern of cavities in the insulating layer, and then sealing the top of the cavities. Further, n or p doped regions and metallic regions can be defined in the processed wafer, thereby enabling integration of biological sensing and electronic capabilities in the same wafer.

First claim

Opening claim text (preview).

What is claimed is: 1. A method comprising: providing a silicon-on-insulator wafer, comprising a first silicon layer, an insulating layer, and a second silicon layer; defining a pattern of holes in the first silicon layer reaching through to the insulating layer; defining cavities in the insulating layer at locations corresponding to the holes of the pattern of holes, wherein each cavity respectively has only a single hole; and depositing a material on top of the cavities or oxidizing the first silicon layer, thereby sealing the top of the cavities and leaving remaining portions of the cavities intact, wherein a top horizontal surface of the material or oxidized first silicon layer is substantially coplanar with a top horizontal surface of the first silicon layer. 2. The method of claim 1 , wherein the defining a pattern of holes comprises etching holes in the first silicon layer by a Bosch or pseudo Bosch process. 3. The method of claim 1 , wherein the insulating layer is a silicon oxide layer. 4. The method of claim 3 , wherein the defining cavities comprises etching the silicon oxide layer with hydrogen fluoride. 5. The method of claim 1 , wherein the material is a polymer, a metal, or an oxide. 6. The method of claim 5 , further comprising defining n or p doped semiconductor regions and metallic regions in the silicon-on-insulator wafer. 7. The method of claim 6 , wherein the n or p doped semiconductor regions and the metallic regions form a biological sensor and associated electronics. 8. The method of claim 1 , wherein each cavity of the cavities extends wider than its corresponding single hole.

Assignees

Inventors

Classifications

  • of isolation regions comprising dielectric materials · CPC title

  • Isolation regions comprising dielectric materials · CPC title

  • Semiconductor-on-insulator [SOI] isolation regions, e.g. buried oxide regions of SOI wafers · CPC title

  • using SOI processes together with lateral isolation, e.g. combinations of SOI and shallow trench isolations · CPC title

  • formed using trench refilling with dielectric materials, e.g. shallow trench isolations · CPC title

Patent family

Related publications grouped by family.

External sources

Frequently asked questions

Answers are generated from the same data shown on this page.

What does patent US9524900B2 cover?
Novel methods to fabricate biological sensors and electronics are disclosed. A silicon-on-insulator wafer can be employed by etching a pattern of holes in the silicon layer, then a pattern of cavities in the insulating layer, and then sealing the top of the cavities. Further, n or p doped regions and metallic regions can be defined in the processed wafer, thereby enabling integration of biologi…
Who is the assignee on this patent?
California Inst Of Techn
What technology area does this patent fall under?
Primary CPC classification H10P90/1906. Mapped technology areas include Electricity.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).