Control circuit of step-down DC-DC converter, control circuit of step-up DC-DC converter and step-up/step-down DC-DC converter

US9523990B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9523990-B2
Application numberUS-201414220628-A
CountryUS
Kind codeB2
Filing dateMar 20, 2014
Priority dateJun 12, 2008
Publication dateDec 20, 2016
Grant dateDec 20, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

A DC-DC converter or the like capable of generating a stable output voltage is provided. A control circuit 11 of a current mode step-down DC-DC converter 1 includes a slope compensation circuit SC and an offset circuit IF 1. The slope compensation circuit SC adds an increase gradient m 2 due to slope compensation to an increase gradient of a coil current waveform Vsense in a range wherein an ON period Ton of a switch SW 1 exceeds ½ of an operating cycle T. An offset circuit IF 1 applies an offset voltage Voffset which becomes smaller depending on the ON period Ton in excess of ½ of an operating cycle T, to a coil current waveform Vsense.

First claim

Opening claim text (preview).

What is claimed is: 1. A method of DC-DC conversion, comprising: generating a current by combining a sense current and an offset current; converting the generated current to a converted voltage; generating a slope signal based on a slope of the converted voltage; generating a differential signal based on an output signal and a reference signal; and controlling a switching element based on a comparison between the differential signal and the slope signal. 2. The method of claim 1 , wherein the slope signal includes an increase slope of the voltage. 3. The method of claim 1 , wherein the sense current comprises current detected flowing through a coil coupled between an input terminal and an output terminal. 4. The method of claim 3 , wherein the switching element is coupled in series with the coil. 5. The method of claim 1 , further comprising generating the offset current based on the input voltage. 6. The method of claim 5 , wherein the offset current is generated such that it varies with the input voltage. 7. The method of claim 5 , wherein the offset current is generated such that it remains constant when the input voltage is greater than a maximum value. 8. The method of claim 5 , wherein the offset current is generated such that it varies with the input voltage when the input voltage is greater than the output voltage and less than a maximum value. 9. The method of claim 8 , wherein the maximum value is greater than or equal to twice the output voltage. 10. The method of claim 1 , wherein generating the slope signal comprises generating the slope signal such that it varies with the converted voltage. 11. A DC-DC converter, comprising: a coil coupled between an input terminal and an output terminal; a switching element coupled in series with the coil; and a control circuit configured to: generate a current by combining a sense current and an offset current; convert the generated current to a converted voltage; generate a slope signal based on a slope of the converted voltage; generate a differential signal based on an output signal and a reference signal; and control a switching element based on a comparison between the differential signal and the slope signal. 12. The DC-DC converter of claim 11 , wherein the control circuit is configured generate the slope signal such that it includes an increase slope of the voltage. 13. The DC-DC converter of claim 11 , wherein the control circuit is further configured to detect the sense current by detecting current flowing through the coil. 14. The DC-DC converter of claim 13 , wherein the input terminal is configured to receive an input voltage and the output terminal is configured to output and output voltage. 15. The DC-DC converter of claim 11 , wherein the control circuit is further configured to generate the offset current based on the input voltage. 16. The DC-DC converter of claim 15 , wherein the control circuit is configured to generate the offset current such that it varies with the input voltage. 17. The DC-DC converter of claim 15 , wherein the control circuit is configured to generate the offset current such that it remains constant when the input voltage is greater than a maximum value. 18. The DC-DC converter of claim 15 , wherein the control circuit is configured to generate the offset current such that it varies with the input voltage when the input voltage is greater than the output voltage and less than a maximum value. 19. The DC-DC converter of claim 18 , wherein the maximum value is greater than or equal to twice the output voltage. 20. The DC-DC converter of claim 11 , wherein the control circuit is configured to generate the slope signal by generating the slope signal such that it varies with the converted voltage.

Assignees

Inventors

Classifications

  • Electricity · mapped topic

  • with automatic control of output voltage or current, e.g. switching regulators · CPC title

  • G05F1/461Primary

    using an operational amplifier as final control device · CPC title

  • Arrangements for modifying reference values, feedback values or error values in the control loop of a converter · CPC title

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Frequently asked questions

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What does patent US9523990B2 cover?
A DC-DC converter or the like capable of generating a stable output voltage is provided. A control circuit 11 of a current mode step-down DC-DC converter 1 includes a slope compensation circuit SC and an offset circuit IF 1. The slope compensation circuit SC adds an increase gradient m 2 due to slope compensation to an increase gradient of a coil current waveform Vsense in a range wherein…
Who is the assignee on this patent?
Cypress Semiconductor Corp
What technology area does this patent fall under?
Primary CPC classification G05F1/461. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 20 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).