Solid-state imaging devices with impurity regions between photoelectric conversion regions and methods for manufacturing the same

Patent metadata

Field	Value
Publication number	US-9520432-B2
Application number	US-201514837673-A
Country	US
Kind code	B2
Filing date	Aug 27, 2015
Priority date	Nov 14, 2002
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

Channel stop sections formed by multiple times of impurity ion implanting processes. Four-layer impurity regions are formed across the depth of a semiconductor substrate (across the depth of the bulk), so that a P-type impurity region is formed deep in the semiconductor substrate; thus, incorrect movement of electric charges is prevented. Other four-layer impurity regions of another channel stop section are decreased in width step by step across the depth of the substrate, so that the reduction of a charge storage region of a light receiving section due to the dispersion of P-type impurity in the channel stop section is prevented in the depth of the substrate.

First claim

What is claimed is:

1. An imaging device comprising:
a semiconductor substrate having a first side and a second side opposite to the first side;
a first photoelectric conversion region and a second photoelectric conversion region disposed in the semiconductor substrate;
a transfer electrode adjacent to the first side of the semiconductor substrate; and
a first impurity region and a second impurity region in the semiconductor substrate;
wherein,
the first and second impurity regions are between the first photoelectric conversion region and the second photoelectric conversion region,
the first and second photoelectric conversion regions include an N-type impurity region,
the first and second impurity regions include a P-type impurity region,
the second impurity region is closer to the second side of the semiconductor substrate than the first impurity region, and
a cross-sectional area of the first impurity region is larger than a cross-sectional area of the second impurity region.

2. The imaging device according to claim 1 , further comprising a third impurity region associated with the second impurity region along a direction of increasing depth of the semiconductor substrate, wherein when viewed in the direction of increasing depth of the semiconductor substrate, a cross-sectional area of the third impurity region is smaller than a cross-sectional area of the second impurity region.

3. The imaging device according to claim 1 , wherein each of the impurity regions, when viewed in a direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area that is different for at least two of the impurity regions.

4. The imaging device according to claim 2 , wherein each of the impurity regions, when viewed in a direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area that is different for at least two of the impurity regions.

5. The imaging device according to claim 3 , wherein, for each of the impurity regions in the direction of increasing depth of the semiconductor substrate, the generally uniform cross-sectional area is less than that of a preceding adjoining impurity region.

6. The imaging device according to claim 2 , wherein each of the impurity regions, when viewed in the direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area and wherein, for each of the impurity regions in the direction of increasing depth of the semiconductor substrate, the generally uniform cross-sectional area is less than that of a preceding adjoining impurity region.

7. The imaging device according to claim 1 , wherein each of the impurity regions, when viewed in a direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area equal to the generally uniform cross-sectional area of each other impurity region of the plurality of adjoining impurity regions.

8. The imaging device according to claim 1 , further comprising a third impurity region associated with the second impurity region along a direction of increasing depth of the semiconductor substrate, wherein each of the impurity regions, when viewed in the direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area equal to the generally uniform cross-sectional area of each other impurity region of the plurality of adjoining impurity regions.

9. The imaging device according to claim 1 , wherein each of the impurity regions has an ion concentration different from the ion concentration of at least one other impurity region.

10. The imaging device according to claim 2 , wherein each of the impurity regions has an ion concentration different from the ion concentration of at least one other impurity region.

11. The imaging device according to claim 1 , wherein the imaging device is a CCD imaging device.

12. The imaging device according to claim 1 , wherein the imaging device is a CMOS imaging device.

13. An imaging device comprising:
a semiconductor substrate having a first side and a second side opposite to the first side;
a first photoelectric conversion region and a second photoelectric conversion region disposed in the semiconductor substrate;
a transfer electrode disposed adjacent to the first side of the semiconductor substrate;
a first impurity region and a second impurity region disposed in the semiconductor substrate; and
an overflow barrier disposed in the semiconductor substrate;
wherein,
the first and second impurity regions are in contact with the overflow barrier,
the first and second impurity regions are disposed between the first photoelectric conversion region and the second photoelectric conversion region,
the first and second photoelectric conversion regions include an N-type impurity region,
the first and second impurity regions include a P-type impurity region,
the second impurity region is closer to the second side of the semiconductor substrate than the first impurity region, and
a cross-sectional area of the first impurity region is larger than a cross-sectional area of the second impurity region.

14. The imaging device according to claim 13 , further comprising a third impurity region associated with the second impurity region along a direction of increasing depth of the semiconductor substrate, wherein the cross-sectional area of the third impurity region is smaller than a cross-sectional area of the second impurity region.

15. The imaging device according to claim 13 , wherein each of the impurity regions, when viewed in a direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area that is different for at least two of the impurity regions.

16. The imaging device according to claim 13 , wherein each of the impurity regions, when viewed in a direction of increasing depth of the semiconductor substrate, has a generally uniform cross-sectional area equal to the generally uniform cross-sectional area of each other impurity region.

17. The imaging device according to claim 13 , wherein each of the impurity regions has an ion concentration different from the ion concentration of at least one other impurity region.

18. The imaging device according to claim 13 , wherein the imaging device is a CCD imaging device.

19. The imaging device according to claim 13 , wherein the imaging device is a CMOS imaging device.

20. The imaging device according to claim 13 , further comprising a third impurity region associated with the second impurity region along a direction of increasing depth of the semiconductor substrate, wherein each successive impurity region of the impurity regions in the direction of increasing depth of the semiconductor substrate has a generally uniform cross-sectional area that is less than that of a preceding adjoining impurity region.

Assignees

• Sony Corp

Inventors

• Hirata Kiyoshi

Classifications

• H01L27/1463 Primary

  Electricity · mapped topic

• H01L27/14689

  Electricity · mapped topic

• H01L27/14656

  Electricity · mapped topic

• H01L31/035272

  Electricity · mapped topic

• H01L27/1461

  Electricity · mapped topic