Angled ion beam processing of heterogeneous structure

Patent metadata

Field	Value
Publication number	US-9520360-B2
Application number	US-201615131332-A
Country	US
Kind code	B2
Filing date	Apr 18, 2016
Priority date	Dec 5, 2014
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

A method for fabricating a multilayer structure includes providing a mask on a device stack disposed on the substrate, the device stack comprising a first plurality of layers composed of a first layer type and a second layer type; directing first ions along a first direction forming a first non-zero angle of incidence with respect to a normal to a plane of the substrate, wherein a first sidewall is formed having a sidewall angle forming a first non-zero angle of inclination with respect to the normal, the first sidewall comprising a second plurality of layers from at least a portion of the first plurality of layers and composed of the first layer type and second layer type; and etching the second plurality of layers using a first selective etch wherein the first layer type is selectively etched with respect to the second layer type.

First claim

What is claimed is:

1. A semiconductor device, comprising:
a heterogeneous device stack disposed on a substrate, the heterogeneous device stack comprising a first layer type and a second layer type;
a first sidewall, the first sidewall comprising the first layer type and second layer type and defining a first average sidewall angle having a non-zero angle of inclination with respect to a normal to a plane defined by the substrate; and
a second sidewall, the second sidewall comprising the first layer type and second layer type and defining a second average sidewall angle different from the first average sidewall angle,
wherein the first sidewall comprises a stepped structure.

2. The multilayer device of claim 1 , wherein the second average sidewall angle is parallel to the normal.

3. The multilayer device of claim 1 , wherein the heterogeneous device stack comprises a vertical NAND memory device (VNAND).

4. A multilayer semiconductor device, comprising:
a heterogeneous device stack disposed on a substrate, the heterogeneous device stack comprising a first layer of a first layer type and a second layer of a second layer type, the heterogeneous device stack comprising four sides;
wherein a first side of the four sides comprises a plurality of stepped surfaces, the plurality of stepped surfaces formed from the first layer and the second layer and defining a first average sidewall angle having a non-zero angle of inclination with respect to a normal to a plane defined by the substrate; and
wherein a second side of the four sides extends along the normal to the plane defined by the substrate.

5. The multilayer device of claim 4 , wherein the heterogeneous device stack comprises a vertical NAND memory device (VNAND) having a first plurality of layers of the first layer type and a second plurality of layers of the second layer type to serve as storage elements.

6. The multilayer semiconductor device of claim 4 , wherein:
a third side and a fourth side of the four sides extend along the normal to the plane defined by the substrate.

7. The multilayer semiconductor device of claim 4 , wherein:
a third side defines a second average sidewall angle different from the first average sidewall angle, the third side not extending along the normal.

8. The multilayer semiconductor device of claim 4 , wherein the first average sidewall angle defines a non-zero angle of inclination with respect to the normal of less than sixty degrees.

9. The multilayer semiconductor device of claim 8 , wherein the first average sidewall angle defines a non-zero angle of inclination with respect to the normal of fifteen degrees to thirty degrees.

10. The multilayer device of claim 4 , wherein the heterogeneous device stack comprises:
a third side of the four sides having a plurality of stepped surfaces and defining the first average sidewall angle; and
a fourth side of the four sides extending along the normal.

11. The multilayer device of claim 10 , further comprising a plurality of additional heterogeneous device stacks, the plurality of additional heterogeneous devices stacks comprising four side sides and further comprising:
a first layer of the first layer type and second layer of the second layer type;
first two sides side of the four sides having a plurality of stepped surfaces and defining the first average sidewall angle; and
two additional sides of the four sides extending along the normal to the substrate plane,
wherein the two additional sides of a heterogeneous device stack of the plurality of additional heterogeneous device stacks extend parallel to the second side and fourth side of the heterogeneous device stack.

12. A multilayer semiconductor device, comprising:
a heterogeneous device stack disposed on a substrate, the heterogeneous device stack comprising a plurality of layers of a first layer type and a plurality of layers of a second layer type arranged in alternating fashion, the heterogeneous device stack comprising four sides; wherein a first side of the four sides has a plurality of stepped surfaces and defines a first average sidewall angle, the first average sidewall angle defining a non-zero angle of inclination with respect to a normal to a plane defined by the substrate, and wherein the non-zero angle of inclination is less than 60 degrees.

13. The multilayer semiconductor device of claim 12 , wherein:
the first side and a second side of the four sides have a plurality of stepped surfaces and define the first average sidewall angle having a non-zero angle of inclination with respect to the normal to a substrate plane; and wherein
a third side and a fourth side of the four sides extend along the normal.

14. The multilayer semiconductor device of claim 12 , wherein:
the four sides have a plurality of stepped surfaces and define the non-zero angle of inclination with respect to the normal.

15. The multilayer semiconductor device of claim 12 , wherein
a second side of the four sides comprises a plurality of stepped surfaces defining the first average sidewall angle; and wherein
a third side and a fourth side of the four sides define a second average sidewall angle, the second average sidewall angle differing from the first average sidewall angle, the third side and a fourth side not extending along the normal.

16. The multilayer semiconductor device of claim 12 ,
further comprising a plurality of additional heterogeneous device stacks, the plurality of additional heterogeneous devices stacks having four sides and further comprising:
a plurality of layers of the first layer type and a plurality of layers of the second layer type, wherein a first side of the fours sides has a plurality of stepped surfaces and defines the first average sidewall angle.

17. The multilayer semiconductor device of claim 12 , wherein the first layer type comprises silicon and the second layer type comprises an insulator.

18. The multilayer semiconductor device of claim 12 , further comprising a first electrical contact formed on a first layer of the first layer type and a second electrical contact formed on a second layer of the first layer type, the second layer being spaced from the first layer by one layer of the second layer type.

Assignees

• Varian Semiconductor Equipment Ass Inc

Inventors

• Renau Anthony
• Hatem Christopher

Classifications

• H10P50/667

  by liquid etching only · CPC title

• H10P50/283

  by chemical means · CPC title

• H10P50/268

  of silicon-containing layers · CPC title

• H10P50/282

  of inorganic materials · CPC title

• H10P50/263

  of silicon-containing layers · CPC title