Systems and methods for mura calibration preparation

Patent metadata

Field	Value
Publication number	US-9519164-B2
Application number	US-201213601529-A
Country	US
Kind code	B2
Filing date	Aug 31, 2012
Priority date	Jun 8, 2012
Publication date	Dec 13, 2016
Grant date	Dec 13, 2016

Abstract

Systems and methods for calibrating an electronic display to reduce or eliminate artifacts are provided. One method for reducing or eliminating artifacts may involve baking the operational—but not yet fully calibrated—electronic display to reduce stray charge on the electronic display. After baking the display, the electronic display may be calibrated to reduce or eliminate flicker and/or mura artifacts

First claim

What is claimed is:

1. A method for manufacturing an electronic display comprising:
baking the electronic display to reduce stray charge on the electronic display comprising a liquid crystal display, wherein:
reducing the stray charge reduces bias voltages accumulated in the liquid crystal display, wherein reducing the bias voltages reduces a mura artifact or a flicker of the liquid crystal display;
the liquid crystal display comprises a plurality of distinct common voltage layers (VCOMs), wherein each VCOM provides a common electrode for a plurality of pixels, wherein each pixel comprises a respective pixel electrode, wherein each pixel is configured to be activated by at least one of a plurality of gate lines; and
the electronic display is configured to be sufficiently operational so as to be capable of being calibrated to reduce the mura artifact or the flicker of the liquid crystal display; and

calibrating the electronic display to reduce the mura artifact or the flicker of the liquid crystal display after baking the display.

2. The method of claim 1 , wherein calibrating the electronic display comprises tuning the electronic display to reduce or eliminate the mura artifact that is a result of voltage differences between the plurality of distinct VCOMs.

3. The method of claim 1 , wherein calibrating the electronic display comprises tuning the electronic display to reduce or eliminate the flicker.

4. The method of claim 3 , wherein the electronic display is tuned to reduce or eliminate the flicker while the plurality of pixels of the liquid crystal display are programmed to display a gray level configured to produce a stronger contrast of the mura artifact than most other gray levels on a scale from G 0 to G 255 .

5. The method of claim 3 , wherein the electronic display is tuned to reduce or eliminate the flicker while the plurality of pixels of the liquid crystal display are programmed to display a gray level of between G 40 to G 80 on a scale from G 0 to G 255 .

6. The method of claim 3 , wherein the electronic display is tuned to reduce or eliminate the flicker while the plurality of pixels of the liquid crystal display are programmed to display a gray level configured to produce a stronger contrast of the mura artifact than all other gray levels on a scale from G 0 to G 255 .

7. The method of claim 3 , wherein the electronic display is tuned to reduce or eliminate the flicker while the plurality of pixels of the liquid crystal display are programmed to display a gray level of G 63 on a scale from G 0 to G 255 .

8. A method for manufacturing an electronic display, comprising:
providing a liquid crystal display, wherein the liquid crystal display comprises a plurality of distinct common voltage layers (VCOMs) configured to cause a mura artifact to appear on the liquid crystal display when the liquid crystal display is operated, wherein each VCOM provides a common electrode for a plurality of pixels, wherein each pixel comprises a respective pixel electrode, wherein each pixel is configured to be activated by at least one of a plurality of gate lines;
baking the liquid crystal display to reduce stray charge, wherein reducing the stray charge reduces bias voltages accumulated in the liquid crystal display, wherein reducing the bias voltages reduces the mura artifact or a flicker of the liquid crystal display; and
calibrating an operating parameter of the liquid crystal display to reduce or eliminate the mura artifact after the stray charge has been reduced due to baking.

9. The method of claim 8 , wherein the method is performed before the liquid crystal display is installed into a host electronic device.

10. The method of claim 8 , wherein the method is performed while the liquid crystal display is installed in a host electronic device.

11. The method of claim 8 , wherein the liquid crystal display is baked at a temperature of between 40 and 60 degrees Celsius.

12. The method of claim 8 , wherein the liquid crystal display is baked for a period of time configured to cause substantially all stray charge on the liquid crystal display due to prior manufacturing steps to become dissipated.

13. The method of claim 8 , wherein the liquid crystal display is baked at a humidity higher than typically employed during liquid crystal display manufacturing.

14. The method of claim 8 , wherein the liquid crystal display is baked at a humidity of between 40 and 60 percent.

15. The method of claim 8 , wherein the liquid crystal display is baked a humidity higher than prior manufacturing steps to prevent electrostatic discharge from damaging the liquid crystal display.

16. A method for manufacturing an electronic device, comprising:
installing an electronic display into the electronic device, wherein stray charge accumulates on components of the electronic display during installation, wherein the electronic display comprises a liquid crystal display, wherein the liquid crystal display comprises a plurality of distinct common voltage layers (VCOMs), wherein each VCOM provides a common electrode for a plurality of pixels, wherein each pixel comprises a respective pixel electrode, wherein each pixel is configured to be activated by at least one of a plurality of gate lines;
baking the electronic device to cause the stray charge to dissipate from the components of the electronic display, wherein causing the stray charge dissipate from the components of the electronic display reduces bias voltages accumulated in the liquid crystal display, wherein reducing the bias voltages reduces a mura artifact or a flicker of the liquid crystal display; and
calibrating the electronic display while the stray charge is dissipated.

17. The method of claim 16 , wherein calibrating the electronic display comprises:
tuning the electronic display to reduce or eliminate the flicker while the electronic display is programmed to display a gray level that produces a stronger contrast of the mura artifact than most other gray levels on a scale from G 0 to G 255 ; and
tuning the electronic display to reduce or eliminate the mura artifact.

18. The method of claim 16 , wherein the electronic device comprises a handheld device, a portable phone, a notebook computer, a tablet computer, or a desktop computer, or any combination thereof.

Assignees

• Al-Dahle Ahmad
• Stronks David A
• Bae Hopil
• Apple Inc

Inventors

• Al-Dahle Ahmad
• Stronks David A
• Bae Hopil

Classifications

• G02F1/1309 Primary

  Repairing; Testing · CPC title

• G02F1/136204

  Arrangements to prevent high voltage or static electricity failures · CPC title

• G02F1/13338

  Input devices, e.g. touch panels · CPC title

• G09G2320/0693

  Calibration of display systems · CPC title

• G02F1/13 Primary

  based on liquid crystals, e.g. single liquid crystal display cells · CPC title