Printed circuit board
US-2024057251-A1 · Feb 15, 2024 · US
US9516751B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9516751-B2 |
| Application number | US-201314417751-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 17, 2013 |
| Priority date | Sep 21, 2012 |
| Publication date | Dec 6, 2016 |
| Grant date | Dec 6, 2016 |
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Official abstract text for this publication.
To provide a wiring board excellent in connection reliability with a semiconductor chip. A first buildup layer 31 where resin insulating layers 21 and 22 and a conductor layer 24 are laminated is formed at a substrate main surface 11 side of an organic wiring board 10 . The conductor layer 24 for an outermost layer in the first buildup layer 31 includes a plurality of connecting terminal portions 41 for flip-chip mounting a semiconductor chip. The plurality of connecting terminal portions 41 is exposed through an opening portion 43 of a solder resist layer 25 . Each connecting terminal portion 41 includes a connection region 51 for a semiconductor chip and a wiring region 52 disposed to extend from the connection region 51 along the planar direction. The solder resist layer 25 includes, within the opening portion 43 , a side-surface covering portion 55 that covers the side surface of the connecting terminal portion 41 and a projecting wall portion 56 that is integrally formed with the side-surface covering portion 55 and disposed to project so as to intersect with the connection region 51.
Opening claim text (preview).
What is claimed is: 1. A wiring board, comprising a laminated body where respective one or more layers of insulating layers and conductor layers are laminated, the conductor layer in an outermost layer of the laminated body including a plurality of connecting terminal portions disposed in a mounting area for a semiconductor chip so as to flip-chip mount the semiconductor chip, a solder resist layer being disposed as the insulating layer in an outermost layer of the laminated body,…
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