Methods of forming semiconductor devices
US-2024387699-A1 · Nov 21, 2024 · US
US9514955B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9514955-B2 |
| Application number | US-201514712327-A |
| Country | US |
| Kind code | B2 |
| Filing date | May 14, 2015 |
| Priority date | Jun 13, 2014 |
| Publication date | Dec 6, 2016 |
| Grant date | Dec 6, 2016 |
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A method for processing a substrate includes providing the substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer, a stop layer, a carbon layer and a stack including a plurality of layers. The method includes defining a hole pattern including a plurality of holes in the PR/BARC layer using photolithography; transferring the hole pattern into the carbon layer; filling the plurality of holes in the hole pattern with oxide to create oxide pillars; using a planarization technique to remove the hard mask layer, a remaining portion of the PR/BARC layer and the stop layer; stripping the carbon layer to expose the oxide pillars; filling space between the oxide pillars with hard a mask material including metal; planarizing at least part of the hard mask material; and stripping the oxide pillars to expose the hole pattern in the hard mask material.
Opening claim text (preview).
What is claimed is: 1. A method for processing a substrate, comprising: providing a substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer, a stop layer, a carbon layer and a stack including a plurality of layers; defining a hole pattern including a plurality of holes in the PR/BARC layer using photolithography; transferring the hole pattern, as defined in the PR/BARC layer, from the PR/BARC layer into the carbon layer; filling the plurality of holes in the hole pattern, as defined in the PR/BARC layer and the carbon layer, with oxide to create oxide pillars; using a planarization technique to remove the hard mask layer, a remaining portion of the PR/BARC layer and the stop layer; stripping the carbon layer to expose the oxide pillars; and filling space between the oxide pillars with a hard mask material including metal. 2. The method of claim 1 , wherein the planarization technique includes using chemical mechanical polishing. 3. The method of claim 1 , wherein filling the space includes using physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD) or electroless deposition (ELD). 4. The method of claim 1 , wherein filling the space includes using chemical vapor deposition (CVD) and further comprising depositing a glue layer. 5. The method of claim 4 , wherein the glue layer includes a tungsten (W) layer. 6. The method of claim 1 , further comprising planarizing excess hard mask material. 7. The method of claim 6 , wherein the planarizing stops on and exposes the oxide pillars. 8. The method of claim 1 , further comprising stripping the oxide pillars to expose the hole pattern in the hard mask material. 9. The method of claim 1 , wherein the plurality of layers includes alternating silicon oxide and silicon nitride layers. 10. A method for processing a substrate comprising: providing the substrate including a photoresist/bottom anti-reflection coating (PR/BARC) layer, a hard mask layer, a stop layer, a carbon layer and a stack including a plurality of layers; defining a hole pattern in the PR/BARC layer using photolithography; transferring the hole pattern including a plurality of holes, as defined in the PR/BARC layer, from the PR/BARC layer into the carbon layer; and filling the plurality of holes in the hole pattern, as defined in the PR/BARC layer and the carbon layer, with oxide to create oxide pillars, wherein the oxide pillars are subsequently used to pattern a hard mask material including metal. 11. The method of claim 10 , further comprising using a planarization technique to remove the hard mask layer, a remaining portion of the PR/BARC layer and the stop layer. 12. The method of claim 11 , wherein the planarization technique includes using chemical mechanical polishing. 13. The method of claim 11 , further comprising stripping the carbon layer to expose the oxide pillars. 14. The method of claim 13 , further comprising filling space between the oxide pillars with the hard mask material. 15. The method of claim 14 , wherein filling the space includes using physical vapor deposition (PVD), chemical vapor deposition (CVD), atomic layer deposition (ALD) or electroless deposition (ELD). 16. The method of claim 14 , wherein filling the space includes using chemical vapor deposition (CVD) and further comprising depositing a glue layer. 17. The method of claim 16 , wherein the glue layer includes a tungsten (W) layer. 18. The method of claim 14 , further comprising planarizing at least part of the hard mask material. 19. The method of claim 18 , wherein the planarizing stops on and exposes the oxide pillars. 20. The method of claim 19 , further comprising stripping the oxide pillars to expose the hole pattern in the hard mask material. 21. The method of claim 10 , wherein the plurality of layers includes alternating layers of silicon nitride and silicon oxide.
the removal being a selective chemical etching step, e.g. selective dry etching through a mask · CPC title
characterised by the processes involved to create the masks · CPC title
using masks for insulating materials · CPC title
Electricity · mapped topic
Electricity · mapped topic
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