Flat covered leadless pressure sensor assemblies suitable for operation in extreme environments

US9513181B2 · US · B2

Patent metadata
FieldValue
Publication numberUS-9513181-B2
Application numberUS-201414151775-A
CountryUS
Kind codeB2
Filing dateJan 9, 2014
Priority dateAug 19, 2011
Publication dateDec 6, 2016
Grant dateDec 6, 2016

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  1. Title

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  2. Abstract

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  3. Assignees and inventors

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  4. Key dates

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  5. First independent claim

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  6. CPC / IPC classifications

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  7. Citations and related patents

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Abstract

Official abstract text for this publication.

This disclosure provides example methods, devices and systems associated with flat covered leadless pressure sensor assemblies suitable for operation in extreme environments. In one embodiment, a system may comprise a semiconductor substrate having a first side and a second side; a diaphragm disposed on the first side of the semiconductor substrate; a first cover coupled to the first side of the semiconductor substrate such that it overlays at least the diaphragm, wherein a pressure applied at the first cover is transferred to the diaphragm; and a sensing element disposed on the second side of the semiconductor substrate, wherein the sensing element is used to measure the pressure.

First claim

Opening claim text (preview).

What is claimed is: 1. A system, comprising: a semiconductor substrate having a first side and a second side; a diaphragm disposed on the first side of the semiconductor substrate, the diaphragm comprising a boss region; a first cover coupled to the boss region and to the first side of the semiconductor substrate, the first cover having a uniformly flat outermost surface, such that the first cover overlays at least the diaphragm, wherein a pressure applied at an outermost surface of the first cover is transferred to the diaphragm; and a sensing element disposed on the second side of the semiconductor substrate, wherein the sensing element is used to measure the pressure. 2. The system of claim 1 , wherein the diaphragm includes a membrane region disposed on the first side of the semiconductor substrate. 3. The system of claim 1 , wherein the sensing element is opposite to the diaphragm on the semiconductor substrate. 4. The system of claim 1 , wherein the sensing element is a piezoresistive network. 5. The system of claim 1 , further comprising: a second cover coupled to the second side of the semiconductor substrate such that the second cover overlays at least the sensing element. 6. The system of claim 5 , wherein the second cover is composed of glass. 7. The system of claim 5 , wherein the semiconductor substrate and the second cover form a hermetic seal. 8. The system of claim 1 , wherein a bottom surface of the first cover has a cut-out opposite the diaphragm. 9. The system of claim 8 , wherein a shape of the cut-out mirrors a shape of the diaphragm. 10. The system of claim 1 , further comprising: an adhesive layer disposed between the semiconductor substrate and the first cover. 11. The pressure sensor assembly of claim 1 , wherein the first cover is composed of a semiconductor material. 12. A sensor by a process, comprising: providing a semiconductor substrate having a first side and a second side; disposing a diaphragm on the first side of the semiconductor substrate; disposing a boss region on the first side of the semiconductor substrate; coupling a first cover having an outermost surface that is uniformly flat to the boss region and to the first side of the semiconductor substrate so that the first cover overlays at least the diaphragm, wherein a pressure applied at an outer surface of the first cover is transferred to the diaphragm; and disposing a sensing element on the second side of the semiconductor substrate, wherein the sensing element is used to measure the pressure transferred to the diaphragm. 13. The sensor by the process of claim 12 , wherein disposing the diaphragm on the first side of the semiconductor substrate includes micro-machining the first side of the semiconductor substrate. 14. The sensor by the process of claim 12 , wherein disposing the diaphragm on the first side of the semiconductor substrate includes: disposing a membrane region on the first side of the semiconductor substrate. 15. The sensor by the process of claim 12 , wherein the sensing element is opposite to the diaphragm on the semiconductor substrate. 16. The sensor by the process of claim 12 , wherein the sensing element is a piezoresistive network. 17. The sensor by the process of claim 12 , further comprising: coupling a second cover to the second side of the semiconductor substrate such that the second cover overlays at least the sensing element. 18. The sensor by the process of claim 17 , wherein the second cover is composed of glass. 19. The sensor by the process of claim 17 , wherein the semiconductor substrate and the second cover form a hermetic seal. 20. The sensor by the process of claim 12 , further comprising: forming a cut-out at a bottom surface of the first cover opposite the diaphragm. 21. The sensor by the process of claim 20 , wherein a shape of the cut-out mirrors a shape of the diaphragm. 22. The sensor by the process of claim 12 , further comprising: disposing an adhesive layer between the semiconductor substrate and the first cover. 23. The sensor by the process of claim 12 , wherein the first cover is composed of a semiconductor material.

Assignees

Inventors

Classifications

  • G01L9/0044Primary

    Constructional details of non-semiconductive diaphragms · CPC title

  • Diaphragm with non uniform thickness, e.g. with grooves, bosses or continuously varying thickness · CPC title

  • using buried connections · CPC title

  • G01L9/0048Primary

    Details about the mounting of the diaphragm to its support or about the diaphragm edges, e.g. notches, round shapes for stress relief · CPC title

  • Protection against aggressive medium in general · CPC title

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Frequently asked questions

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What does patent US9513181B2 cover?
This disclosure provides example methods, devices and systems associated with flat covered leadless pressure sensor assemblies suitable for operation in extreme environments. In one embodiment, a system may comprise a semiconductor substrate having a first side and a second side; a diaphragm disposed on the first side of the semiconductor substrate; a first cover coupled to the first side of th…
Who is the assignee on this patent?
Kulite Semiconductor Products Inc
What technology area does this patent fall under?
Primary CPC classification G01L9/0044. Mapped technology areas include Physics.
When was this patent published?
Publication date Tue Dec 06 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
What related patents are in patentsdb?
We list 8 related publications on this page (citations in our corpus or others sharing the same primary CPC).