Manufacturing method of display device

Patent metadata

Field	Value
Publication number	US-9508761-B2
Application number	US-201514606199-A
Country	US
Kind code	B2
Filing date	Jan 27, 2015
Priority date	Jan 31, 2014
Publication date	Nov 29, 2016
Grant date	Nov 29, 2016

Abstract

Since a film, which is the upper layer of an interlayer insulating film and has a fast etching rate, does not have dense film quality, moisture is entered from the end portion of a substrate, and it is likely that display unevenness and the like occur. A manufacturing method of a display device includes the steps of: forming a first contact hole on the first interlayer film; forming a second interlayer film on the first interlayer film and in the first contact hole, the second interlayer film having a lower layer film and an upper layer film having an etching rate faster than an etching rate of the lower layer film; forming a second contact hole on the second interlayer film; and removing at least a part of the upper layer film.

First claim

What is claimed is:

1. A manufacturing method of a display device comprising the steps of:
(a) preparing a substrate having an electrode of a thin film transistor;
(b) forming a first interlayer film on the electrode;
(c) forming a first contact hole on the first interlayer film by removing a part of the first interlayer film;
(j) forming a first electrode on the first interlayer film by forming a first conductive film and patterning the first conductive film;
(d) forming a second interlayer film on the first interlayer film and in the first contact hole and on the first electrode, the second interlayer film having a first film and a second film provided above the first film, the second film having an etching rate faster than an etching rate of the first film;
(e) forming a second contact hole on the second interlayer film in the first contact hole;
(f) removing at least a part of the second film on the second contact hole and on the first electrode;
(g) forming a second conductive film on the first layer of the second interlayer film and in the second contact hole; and
(h) forming a second electrode by patterning the second conductive film on the second contact hole, wherein
the step (a) includes preparing the substrate having the electrode of the thin film transistor in a pixel forming region and a wiring in a peripheral region outside of the pixel forming region,
the step (b) includes forming the first interlayer film on the electrode in the pixel forming region and on the peripheral region,
the step (c) includes removing at least a part of the first interlayer film in a first region of the pixel forming region and a part of the wiring forming region,
the step (d) includes forming the second interlayer film in the first region, and
the step (f) includes removing at least a part of the second film on the second interlayer film in the first region.

2. The manufacturing method of a display device according to claim 1 ,
wherein the step (e) includes the steps of:
(e1) patterning a photoresist, and
(e2) dry etching the second interlayer film using the patterned photoresist as a mask.

3. The manufacturing method of a display device according to claim 2 ,
wherein the step (f) includes the steps of:
(f1) ashing the photoresist, and
(f2) dry etching the second film.

4. The manufacturing method of a display device according to claim 3 ,
wherein the step (f) includes the step of:
(f3) removing the photoresist.

5. The manufacturing method of a display device according to claim 2 ,
wherein the step (f) includes the steps of:
(f1) ashing the photoresist, and
(f2) wet etching the second film.

6. The manufacturing method of a display device according to claim 5 ,
wherein the step (f) includes the step of:
(f3) removing the photoresist.

7. The manufacturing method of a display device according to claim 2 ,
wherein the step (f) includes the steps of:
(f1) ashing the photoresist, and
(f2) removing the photoresist.

8. The manufacturing method of a display device according to claim 7 ,
wherein the step (f) includes the step of:
(f3) dry etching the second film.

9. The manufacturing method of a display device according to claim 1 , wherein the first interlayer film is an organic film.

10. The manufacturing method of a display device according to claim 9 , wherein the organic film is formed of a photosensitive resin.

11. The manufacturing method of a display device according to claim 1 , wherein the second interlayer film is a silicon nitride film (SiN).

12. The manufacturing method of a display device according to claim 11 , wherein the silicon nitride film is formed by plasma CVD.

13. The manufacturing method of a display device according to claim 12 , wherein film forming conditions for the first film and the second film of the silicon nitride film are changed.

14. The manufacturing method of a display device according to claim 13 , wherein in the step of forming the first film and the second film of the silicon nitride film, a gas flow ratio of monosilane (SiH 4 ) to ammonia (NH 3 ), which are material gases, is changed in forming the films by plasma CVD.

15. The manufacturing method of a display device according to claim 1 , wherein the second electrode is a pixel electrode.

16. The manufacturing method of a display device according to claim 15 , further comprising the step of:
(i) forming an alignment film on the pixel electrode.

17. The manufacturing method of a display device according to claim 1 , wherein the electrode of thin film transistor is a drain electrode.

18. The manufacturing method of a display device according to claim 1 , wherein a semiconductor layer of the thin film transistor is formed of polysilicon.

19. The manufacturing method of a display device according to claim 1 , further comprising the step of:
(k) depositing a sealing material on the first film of the second interlayer film in the first region.

Assignees

• Japan Display Inc

Inventors

• Kanda Noriyoshi

Classifications

• H10W20/082

  the openings being tapered via holes · CPC title

• H10D86/451

  characterised by the compositions or shapes of the interlayer dielectrics · CPC title

• H10D86/441

  Interconnections, e.g. scanning lines · CPC title

• H10D86/60

  wherein the TFTs are in active matrices · CPC title

• H10D30/0321

  comprising silicon, e.g. amorphous silicon or polysilicon · CPC title