Power amplifier modules including related systems, devices, and methods
US-9041472-B2 · May 26, 2015 · US
Methods of forming conductive jumper traces
US9508635B2 · US · B2
| Field | Value |
|---|---|
| Publication number | US-9508635-B2 |
| Application number | US-201313929775-A |
| Country | US |
| Kind code | B2 |
| Filing date | Jun 27, 2013 |
| Priority date | Jun 27, 2013 |
| Publication date | Nov 29, 2016 |
| Grant date | Nov 29, 2016 |
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Abstract
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Methods of forming conductive jumper traces for semiconductor devices and packages. Substrate is provided having first, second and third trace lines formed thereon, where the first trace line is between the second and third trace lines. The first trace line can be isolated with a covering layer. A conductive layer can be formed between the second and third trace lines and over the first trace line by a depositing process followed by a heating process to alter the chemical properties of the conductive layer. The resulting conductive layer is able to conform to the covering layer and serve to provide electrical connection between the second and third trace lines.
First claim
Opening claim text (preview).
What is claimed is: 1. A method of making a semiconductor device, comprising: providing a substrate; disposing a semiconductor die on the substrate; forming a first conductive trace and second conductive trace on the substrate adjacent to the semiconductor die; forming a third conductive trace on the substrate between the first conductive trace and second conductive trace; forming a first insulating layer over the third conductive trace; forming a first conductive layer…
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Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
Electricity · mapped topic
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Frequently asked questions
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- What does patent US9508635B2 cover?
- Methods of forming conductive jumper traces for semiconductor devices and packages. Substrate is provided having first, second and third trace lines formed thereon, where the first trace line is between the second and third trace lines. The first trace line can be isolated with a covering layer. A conductive layer can be formed between the second and third trace lines and over the first trace l…
- Who is the assignee on this patent?
- Stats Chippac Ltd, Stats Chippac Pte Ltd
- What technology area does this patent fall under?
- Primary CPC classification H10W70/65. Mapped technology areas include Electricity.
- When was this patent published?
- Publication date Tue Nov 29 2016 00:00:00 GMT+0000 (Coordinated Universal Time) (B2). Legal status and post-grant events are not shown on this page.
- What related patents are in patentsdb?
- We list 1 related publication on this page (citations in our corpus or others sharing the same primary CPC).